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Message-ID: <7ee463db-3cb5-c340-ac1d-1dfcd2b87dcd@microchip.com>
Date: Mon, 11 Jul 2022 07:15:11 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <michael@...le.cc>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <Nicolas.Ferre@...rochip.com>,
<alexandre.belloni@...tlin.com>
CC: <linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 1/2] ARM: dts: lan966x: add clock gating register
On 07.07.2022 16:24, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> The clock controller supports an optional clock gating register. This is
> necessary to expose the USB device clock, for example. Add it.
>
> Signed-off-by: Michael Walle <michael@...le.cc>
Applied to at91-dt, thanks!
> ---
> changes since v1:
> - none
>
> arch/arm/boot/dts/lan966x.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 57cb67a180ec..bc102677ff91 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -65,7 +65,7 @@ clks: clock-controller@...c00a8 {
> #clock-cells = <1>;
> clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
> clock-names = "cpu", "ddr", "sys";
> - reg = <0xe00c00a8 0x38>;
> + reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
> };
>
> timer {
> --
> 2.30.2
>
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