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Message-ID: <8a3285cd-d057-eaa0-ebe3-3032abd64d49@ti.com>
Date: Mon, 11 Jul 2022 14:23:45 +0530
From: Jayesh Choudhary <j-choudhary@...com>
To: Nishanth Menon <nm@...com>
CC: <vigneshr@...com>, <devicetree@...r.kernel.org>,
<kristo@...nel.org>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] arm64: dts: ti: k3-am64-main: Enable crypto
accelerator
On 09/07/22 3:38 am, Nishanth Menon wrote:
> On 16:57-20220708, Jayesh Choudhary wrote:
>> From: Peter Ujfalusi <peter.ujfalusi@...com>
>>
>> Add the node for SA2UL.
>>
>> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@...com>
>> [s-anna@...com: drop label, minor cleanups]
>> Signed-off-by: Suman Anna <s-anna@...com>
>> [j-choudhary@...com: drop rng-node, change flag to shared]
>
>
> See thread: https://lore.kernel.org/all/1d6d171f-3c91-530a-27a5-c93153cb2378@ti.com/
>
> lets be consistent as to having the RNG node with disable and logic for
> doing the same.
Okay. Will send a v2 patch.
>
>> Signed-off-by: Jayesh Choudhary <j-choudhary@...com>
>> ---
>> arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 12 ++++++++++++
>> 1 file changed, 12 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> index ada00575f0f2..dd2848cd0740 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
>> @@ -1308,4 +1308,16 @@
>> interrupt-names = "int0", "int1";
>> bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
>> };
>> +
>> + crypto: crypto@...00000 {
>> + compatible = "ti,am64-sa2ul";
>> + reg = <0x00 0x40900000 0x00 0x1200>;
>> + power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
>> + #address-cells = <2>;
>> + #size-cells = <2>;
>> + ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
>> + dmas = <&main_pktdma 0xc001 0>, <&main_pktdma 0x4002 0>,
>> + <&main_pktdma 0x4003 0>;
>> + dma-names = "tx", "rx1", "rx2";
>> + };
>> };
>> --
>> 2.17.1
>>
>
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