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Message-ID: <Ysvvlb/Wu2Vodane@hovoldconsulting.com>
Date: Mon, 11 Jul 2022 11:38:29 +0200
From: Johan Hovold <johan@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Johan Hovold <johan+linaro@...nel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Stanimir Varbanov <svarbanov@...sol.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <bjorn.andersson@...aro.org>,
Krzysztof WilczyĆski <kw@...ux.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-pci@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 05/10] dt-bindings: PCI: qcom: Add SA8540P to binding
On Sat, Jul 09, 2022 at 01:32:03PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Jun 29, 2022 at 04:09:55PM +0200, Johan Hovold wrote:
> > SA8540P is a new platform related to SC8280XP but which uses a single
> > host interrupt for MSI routing.
> >
>
> The newer chipsets are supposed to use 8 MSI's. How come this one uses only 1?
No idea, but the people with access to the documentation could not find
more than one interrupt for SA8540P (unlike SC8280XP).
Johan
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