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Date:   Tue, 12 Jul 2022 17:29:51 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Maxim Levitsky <mlevitsk@...hat.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        syzbot+760a73552f47a8cd0fd9@...kaller.appspotmail.com,
        Tetsuo Handa <penguin-kernel@...ove.sakura.ne.jp>,
        Hou Wenlong <houwenlong.hwl@...group.com>
Subject: Re: [PATCH 1/3] KVM: x86: Mark TSS busy during LTR emulation _after_
 all fault checks

On Tue, Jul 12, 2022, Maxim Levitsky wrote:
> On Mon, 2022-07-11 at 23:27 +0000, Sean Christopherson wrote:
> > Wait to mark the TSS as busy during LTR emulation until after all fault
> > checks for the LTR have passed.  Specifically, don't mark the TSS busy if
> > the new TSS base is non-canonical.
> 
> 
> Took me a while to notice it but I see the canonical check now, so the patch
> makes sense, and so:
> 
> Reviewed-by: Maxim Levitsky <mlevitsk@...hat.com>
> 
> Unrelated, but I do wonder why we use cmpxchg_emulated for setting the busy
> bit, while we use write_segment_descriptor to set the accessed bit.

99% certain it's a historical KVM bug in how it updates the accessed bit.

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