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Message-ID: <Ys3Ye7OR+5IpUoTv@dev-arch.thelio-3990X>
Date: Tue, 12 Jul 2022 13:24:27 -0700
From: Nathan Chancellor <nathan@...nel.org>
To: kernel test robot <lkp@...el.com>
Cc: Josh Poimboeuf <jpoimboe@...nel.org>, llvm@...ts.linux.dev,
kbuild-all@...ts.01.org, linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Borislav Petkov <bp@...e.de>,
Thadeu Lima de Souza Cascardo <cascardo@...onical.com>,
Ben Hutchings <bwh@...nel.org>,
Nick Desaulniers <ndesaulniers@...gle.com>
Subject: Re: [linux-stable-rc:linux-5.10.y 7109/7120]
arch/x86/kernel/cpu/bugs.c:57:21: warning: section attribute is specified on
redeclared variable
On Tue, Jul 12, 2022 at 01:21:15PM -0700, Nathan Chancellor wrote:
> On Wed, Jul 13, 2022 at 04:07:25AM +0800, kernel test robot wrote:
> > tree: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git linux-5.10.y
> > head: ba398a0e54049bb6a1c102245ae84103f103ff2c
> > commit: 855b78ccf1c8c952e148bdbd234cde117b098060 [7109/7120] KVM: VMX: Prevent guest RSB poisoning attacks with eIBRS
> > config: i386-randconfig-a013 (https://download.01.org/0day-ci/archive/20220713/202207130344.AUqExE4E-lkp@intel.com/config)
> > compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project badda4ac3c489a8c8cccdad1f74b9308c350a9e0)
> > reproduce (this is a W=1 build):
> > wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
> > chmod +x ~/bin/make.cross
> > # https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git/commit/?id=855b78ccf1c8c952e148bdbd234cde117b098060
> > git remote add linux-stable-rc https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable-rc.git
> > git fetch --no-tags linux-stable-rc linux-5.10.y
> > git checkout 855b78ccf1c8c952e148bdbd234cde117b098060
> > # save the config file
> > mkdir build_dir && cp config build_dir/.config
> > COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=i386 SHELL=/bin/bash arch/x86/kernel/
> >
> > If you fix the issue, kindly add following tag where applicable
> > Reported-by: kernel test robot <lkp@...el.com>
> >
> > All warnings (new ones prefixed by >>):
> >
> > >> arch/x86/kernel/cpu/bugs.c:57:21: warning: section attribute is specified on redeclared variable [-Wsection]
> > DEFINE_PER_CPU(u64, x86_spec_ctrl_current);
> > ^
> > arch/x86/include/asm/nospec-branch.h:278:12: note: previous declaration is here
> > extern u64 x86_spec_ctrl_current;
> > ^
> > 1 warning generated.
> >
> >
> > vim +57 arch/x86/kernel/cpu/bugs.c
> >
> > c40221c4c496c5 Peter Zijlstra 2022-06-14 55
> > c40221c4c496c5 Peter Zijlstra 2022-06-14 56 /* The current value of the SPEC_CTRL MSR with task-specific bits set */
> > c40221c4c496c5 Peter Zijlstra 2022-06-14 @57 DEFINE_PER_CPU(u64, x86_spec_ctrl_current);
> > c40221c4c496c5 Peter Zijlstra 2022-06-14 58 EXPORT_SYMBOL_GPL(x86_spec_ctrl_current);
> > c40221c4c496c5 Peter Zijlstra 2022-06-14 59
> >
> > :::::: The code at line 57 was first introduced by commit
> > :::::: c40221c4c496c5c026ede111094a96f292875d88 x86/bugs: Keep a per-CPU IA32_SPEC_CTRL value
> >
> > :::::: TO: Peter Zijlstra <peterz@...radead.org>
> > :::::: CC: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
> >
> > --
> > 0-DAY CI Kernel Test Service
> > https://01.org/lkp
> >
>
> Looks like that declaration should be using DECLARE_PER_CPU?
Additionally, this appears to be an issue on mainline, our CI is
starting to roll in with these patches (clang-13 + x86_64 allmodconfig):
https://github.com/ClangBuiltLinux/continuous-integration2/actions/runs/2658541992
https://builds.tuxbuild.com/2Br2Q4juY6VKxbmgzULKe5C3pGq/build.log
I am happy to send a patch if this is correct, unless someone else wants
to.
> Cheers,
> Nathan
>
> diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h
> index 2989b42fcf4e..cbd56675bd7e 100644
> --- a/arch/x86/include/asm/nospec-branch.h
> +++ b/arch/x86/include/asm/nospec-branch.h
> @@ -281,7 +281,7 @@ static inline void indirect_branch_prediction_barrier(void)
>
> /* The Intel SPEC CTRL MSR base value cache */
> extern u64 x86_spec_ctrl_base;
> -extern u64 x86_spec_ctrl_current;
> +DECLARE_PER_CPU(u64, x86_spec_ctrl_current);
> extern void write_spec_ctrl_current(u64 val, bool force);
> extern u64 spec_ctrl_current(void);
>
>
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