linux-kernel - Re: [PATCH 2/3] dt-bindings: irqchip: imx mu work as msi controller

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Message-ID: <d28ea0ac-ff1b-5394-4c76-1561353ab7ce@linaro.org>
Date:   Tue, 12 Jul 2022 12:25:54 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Frank Li <Frank.Li@....com>, tglx@...utronix.de, maz@...nel.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        shawnguo@...nel.org, s.hauer@...gutronix.de, kw@...ux.com,
        bhelgaas@...gle.com, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-pci@...r.kernel.org, peng.fan@....com, aisheng.dong@....com,
        jdmason@...zu.us
Cc:     kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
        kishon@...com, lorenzo.pieralisi@....com, ntb@...ts.linux.dev
Subject: Re: [PATCH 2/3] dt-bindings: irqchip: imx mu work as msi controller

On 07/07/2022 23:02, Frank Li wrote:
> imx mu support generate irq by write a register.
> provide msi controller support so other driver
> can use it by standard msi interface.
> 
> Signed-off-by: Frank Li <Frank.Li@....com>
> ---
>  .../interrupt-controller/fsl,mu-msi.yaml      | 94 +++++++++++++++++++
>  1 file changed, 94 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml
> new file mode 100644
> index 0000000000000..b4ac583f60227
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,mu-msi.yaml
> @@ -0,0 +1,94 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/fsl,mu-msi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX Messaging Unit (MU)
> +
> +maintainers:
> +  - Frank Li <Frank.Li@....com>
> +
> +description: |
> +  The Messaging Unit module enables two processors within the SoC to
> +  communicate and coordinate by passing messages (e.g. data, status
> +  and control) through the MU interface. The MU also provides the ability
> +  for one processor to signal the other processor using interrupts.
> +
> +  Because the MU manages the messaging between processors, the MU uses
> +  different clocks (from each side of the different peripheral buses).
> +  Therefore, the MU must synchronize the accesses from one side to the
> +  other. The MU accomplishes synchronization using two sets of matching
> +  registers (Processor A-facing, Processor B-facing).
> +
> +  MU can work as msi interrupt controller to do doorbell
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - const: fsl,imx6sx-mu-msi
> +      - const: fsl,imx7ulp-mu-msi
> +      - const: fsl,imx8ulp-mu-msi
> +      - const: fsl,imx8-mu-msi
> +      - const: fsl,imx8ulp-mu-msi-s4

Use enum

> +      - items:
> +          - const: fsl,imx8ulp-mu-msi

Single item... why?

> +      - items:
> +          - enum:
> +              - fsl,imx7s-mu-msi
> +              - fsl,imx8mq-mu-msi
> +              - fsl,imx8mm-mu-msi
> +              - fsl,imx8mn-mu-msi
> +              - fsl,imx8mp-mu-msi
> +              - fsl,imx8qm-mu-msi

Why qm is here not compatible with qxp? It's already mentioned in
section below.

> +              - fsl,imx8qxp-mu-msi
> +          - const: fsl,imx6sx-mu-msi
> +      - description: MU work as msi controller
> +        items:
> +          - enum:
> +              - fsl,imx8qm-mu-msi
> +              - fsl,imx8qxp-mu-msi
> +          - const: fsl,imx6sx-mu-msi
> +  reg:
> +    maxItems: 2
> +
> +  interrupts:
> +    minItems: 1
> +    maxItems: 2

Instead describe the items.

> +
> +  interrupt-names:
> +    minItems: 1
> +    items:
> +      - const: tx
> +      - const: rx
> +
> +  clocks:
> +    maxItems: 1
> +
> +  power-domains:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - msi-controller

How this end up here?

Aren't you missing allOf with a reference to msi-controller?

> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +    lsio_mu12: msi@...70000 {
> +               compatible = "fsl,imx6sx-mu-msi-db";

???

> +               msi-controller;
> +               interrupt-controller;

??? How this appeared here

Also fix your indentation like in example-schema.

> +               reg = <0x5d270000 0x10000>,     /* A side */
> +                     <0x5d300000 0x10000>;     /* B side */
> +               reg-names = "a", "b";
> +               interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
> +               power-domains = <&pd IMX_SC_R_MU_12A>,
> +                               <&pd IMX_SC_R_MU_12B>;

Please do not send untested bindings. It's a waste of our time.

Really two items here? You just said only one is allowed.

> +               power-domain-names = "a", "b";

Sorry, this patch looks really poor. a/b is not a descriptive name and
they are not allowed by your own bindings. Please perform some internal
reviews...

> +    };


Best regards,
Krzysztof