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Message-Id: <20220712113402.871838-2-wenst@chromium.org>
Date:   Tue, 12 Jul 2022 19:34:01 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>
Cc:     Chen-Yu Tsai <wenst@...omium.org>, linux-clk@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        NĂ­colas F. R. A. Prado 
        <nfraprado@...labora.com>
Subject: [PATCH 1/2] clk: core: Honor CLK_OPS_PARENT_ENABLE for clk gate ops

In the previous commits that added CLK_OPS_PARENT_ENABLE, support for
this flag was only added to rate change operations (rate setting and
reparent) and disabling unused subtree. It was not added to the
clock gate related operations. Any hardware driver that needs it for
these operations will either see bogus results, or worse, hang.

This has been seen on MT8192 and MT8195, where the imp_ii2_* clk
drivers set this, but dumping debugfs clk_summary would cause it
to hang.

Fixes: fc8726a2c021 ("clk: core: support clocks which requires parents enable (part 2)")
Fixes: a4b3518d146f ("clk: core: support clocks which requires parents enable (part 1)")
Signed-off-by: Chen-Yu Tsai <wenst@...omium.org>
---

I'm guessing Stephen might have some things to say about adding forward
declarations. Moving code around would make the patch larger though.

 drivers/clk/clk.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 7fc191c15507..b3de636eec84 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -215,6 +215,9 @@ static bool clk_core_is_prepared(struct clk_core *core)
 	return ret;
 }
 
+static int clk_core_prepare_enable(struct clk_core *core);
+static void clk_core_disable_unprepare(struct clk_core *core);
+
 static bool clk_core_is_enabled(struct clk_core *core)
 {
 	bool ret = false;
@@ -226,6 +229,9 @@ static bool clk_core_is_enabled(struct clk_core *core)
 	if (!core->ops->is_enabled)
 		return core->enable_count;
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_prepare_enable(core->parent);
+
 	/*
 	 * Check if clock controller's device is runtime active before
 	 * calling .is_enabled callback. If not, assume that clock is
@@ -249,6 +255,9 @@ static bool clk_core_is_enabled(struct clk_core *core)
 	if (core->rpm_enabled)
 		pm_runtime_put(core->dev);
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_disable_unprepare(core->parent);
+
 	return ret;
 }
 
@@ -812,6 +821,9 @@ int clk_rate_exclusive_get(struct clk *clk)
 }
 EXPORT_SYMBOL_GPL(clk_rate_exclusive_get);
 
+static int clk_core_enable(struct clk_core *core);
+static void clk_core_disable(struct clk_core *core);
+
 static void clk_core_unprepare(struct clk_core *core)
 {
 	lockdep_assert_held(&prepare_lock);
@@ -835,6 +847,9 @@ static void clk_core_unprepare(struct clk_core *core)
 
 	WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
 
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_enable(core->parent);
+
 	trace_clk_unprepare(core);
 
 	if (core->ops->unprepare)
@@ -843,6 +858,9 @@ static void clk_core_unprepare(struct clk_core *core)
 	clk_pm_runtime_put(core);
 
 	trace_clk_unprepare_complete(core);
+
+	if (core->flags & CLK_OPS_PARENT_ENABLE)
+		clk_core_disable(core->parent);
 	clk_core_unprepare(core->parent);
 }
 
@@ -891,6 +909,9 @@ static int clk_core_prepare(struct clk_core *core)
 		if (ret)
 			goto runtime_put;
 
+		if (core->flags & CLK_OPS_PARENT_ENABLE)
+			clk_core_enable(core->parent);
+
 		trace_clk_prepare(core);
 
 		if (core->ops->prepare)
@@ -898,6 +919,9 @@ static int clk_core_prepare(struct clk_core *core)
 
 		trace_clk_prepare_complete(core);
 
+		if (core->flags & CLK_OPS_PARENT_ENABLE)
+			clk_core_disable(core->parent);
+
 		if (ret)
 			goto unprepare;
 	}
-- 
2.37.0.144.g8ac04bfd2-goog

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