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Message-ID: <eabcfde4303971335727a132a568e3bf2cb5c3a4.camel@redhat.com>
Date: Tue, 12 Jul 2022 15:11:38 +0300
From: Maxim Levitsky <mlevitsk@...hat.com>
To: Vitaly Kuznetsov <vkuznets@...hat.com>, kvm@...r.kernel.org,
Paolo Bonzini <pbonzini@...hat.com>,
Sean Christopherson <seanjc@...gle.com>
Cc: Anirudh Rayabharam <anrayabh@...ux.microsoft.com>,
Wanpeng Li <wanpengli@...cent.com>,
Jim Mattson <jmattson@...gle.com>,
linux-hyperv@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 24/25] KVM: VMX: Cache MSR_IA32_VMX_MISC in
vmcs_config
On Fri, 2022-07-08 at 16:42 +0200, Vitaly Kuznetsov wrote:
> Like other host VMX control MSRs, MSR_IA32_VMX_MISC can be cached in
> vmcs_config to avoid the need to re-read it later, e.g. from
> cpu_has_vmx_intel_pt() or cpu_has_vmx_shadow_vmcs().
>
> No (real) functional change intended.
>
> Reviewed-by: Jim Mattson <jmattson@...gle.com>
> Signed-off-by: Vitaly Kuznetsov <vkuznets@...hat.com>
> ---
> arch/x86/kvm/vmx/capabilities.h | 11 +++--------
> arch/x86/kvm/vmx/vmx.c | 8 +++++---
> 2 files changed, 8 insertions(+), 11 deletions(-)
>
> diff --git a/arch/x86/kvm/vmx/capabilities.h b/arch/x86/kvm/vmx/capabilities.h
> index 07e7492fe72a..07f7a9534211 100644
> --- a/arch/x86/kvm/vmx/capabilities.h
> +++ b/arch/x86/kvm/vmx/capabilities.h
> @@ -65,6 +65,7 @@ struct vmcs_config {
> u64 cpu_based_3rd_exec_ctrl;
> u32 vmexit_ctrl;
> u32 vmentry_ctrl;
> + u64 misc;
> struct nested_vmx_msrs nested;
> };
> extern struct vmcs_config vmcs_config;
> @@ -225,11 +226,8 @@ static inline bool cpu_has_vmx_vmfunc(void)
>
> static inline bool cpu_has_vmx_shadow_vmcs(void)
> {
> - u64 vmx_msr;
> -
> /* check if the cpu supports writing r/o exit information fields */
> - rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
> - if (!(vmx_msr & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
> + if (!(vmcs_config.misc & MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS))
> return false;
>
> return vmcs_config.cpu_based_2nd_exec_ctrl &
> @@ -371,10 +369,7 @@ static inline bool cpu_has_vmx_invvpid_global(void)
>
> static inline bool cpu_has_vmx_intel_pt(void)
> {
> - u64 vmx_msr;
> -
> - rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
> - return (vmx_msr & MSR_IA32_VMX_MISC_INTEL_PT) &&
> + return (vmcs_config.misc & MSR_IA32_VMX_MISC_INTEL_PT) &&
> (vmcs_config.cpu_based_2nd_exec_ctrl & SECONDARY_EXEC_PT_USE_GPA) &&
> (vmcs_config.vmentry_ctrl & VM_ENTRY_LOAD_IA32_RTIT_CTL);
> }
> diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
> index 35285109856f..ab091758c437 100644
> --- a/arch/x86/kvm/vmx/vmx.c
> +++ b/arch/x86/kvm/vmx/vmx.c
> @@ -2479,6 +2479,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
> u64 _cpu_based_3rd_exec_control = 0;
> u32 _vmexit_control = 0;
> u32 _vmentry_control = 0;
> + u64 misc_msr;
> int i;
>
> /*
> @@ -2613,6 +2614,8 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
> if (((vmx_msr_high >> 18) & 15) != 6)
> return -EIO;
>
> + rdmsrl(MSR_IA32_VMX_MISC, misc_msr);
> +
> vmcs_conf->size = vmx_msr_high & 0x1fff;
> vmcs_conf->basic_cap = vmx_msr_high & ~0x1fff;
>
> @@ -2624,6 +2627,7 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf,
> vmcs_conf->cpu_based_3rd_exec_ctrl = _cpu_based_3rd_exec_control;
> vmcs_conf->vmexit_ctrl = _vmexit_control;
> vmcs_conf->vmentry_ctrl = _vmentry_control;
> + vmcs_conf->misc = misc_msr;
>
> return 0;
> }
> @@ -8241,11 +8245,9 @@ static __init int hardware_setup(void)
>
> if (enable_preemption_timer) {
> u64 use_timer_freq = 5000ULL * 1000 * 1000;
> - u64 vmx_msr;
>
> - rdmsrl(MSR_IA32_VMX_MISC, vmx_msr);
> cpu_preemption_timer_multi =
> - vmx_msr & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;
> + vmcs_config.misc & VMX_MISC_PREEMPTION_TIMER_RATE_MASK;
>
> if (tsc_khz)
> use_timer_freq = (u64)tsc_khz * 1000;
Reviewed-by: Maxim Levitsky <mlevitsk@...hat.com>
Best regards,
Maxim Levitsky
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