linux-kernel - Re: [PATCH 0/3] KVM: x86: Fix fault-related bugs in LTR/LLDT emulation

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Message-Id: <103BF4B8-2ABE-4CB1-9361-F386D820E554@gmail.com>
Date:   Mon, 11 Jul 2022 18:07:47 -0700
From:   Nadav Amit <nadav.amit@...il.com>
To:     Sean Christopherson <seanjc@...gle.com>
Cc:     Paolo Bonzini <pbonzini@...hat.com>, kvm@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        syzbot+760a73552f47a8cd0fd9@...kaller.appspotmail.com,
        Tetsuo Handa <penguin-kernel@...ove.sakura.ne.jp>,
        Hou Wenlong <houwenlong.hwl@...group.com>
Subject: Re: [PATCH 0/3] KVM: x86: Fix fault-related bugs in LTR/LLDT
 emulation

On Jul 11, 2022, at 4:27 PM, Sean Christopherson <seanjc@...gle.com> wrote:

> Patch 1 fixes a bug found by syzkaller where KVM attempts to set the
> TSS.busy bit during LTR before checking that the new TSS.base is valid.
> 
> Patch 2 fixes a bug found by inspection (when reading the APM to verify
> the non-canonical logic is correct) where KVM doesn't provide the correct
> error code if the new TSS.base is non-canonical.
> 
> Patch 3 makes the "dangling userspace I/O" WARN_ON two separate WARN_ON_ONCE
> so that a KVM bug doesn't spam the kernel log (keeping the WARN is desirable
> specifically to detect these types of bugs).

Hi Sean,

If/when you find that I screwed up, would you be kind enough to cc me?

Very likely I won’t be able to assist too much in fixing the bugs under my
current affiliation, but it is always interesting to see the escapees of
Intel’s validation tools… ;-)

Only if you can.

Thanks,
Nadav

[ p.s. - please use my gmail account for the matter ]