linux-kernel - Re: [PATCH] ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CAJZ5v0h4m+efJGQT6uKpPLdqLgHOpp1mXw5pLO_TBY+NimhMog@mail.gmail.com>
Date:   Wed, 13 Jul 2022 21:15:31 +0200
From:   "Rafael J. Wysocki" <rafael@...nel.org>
To:     Mario Limonciello <mario.limonciello@....com>
Cc:     "Rafael J. Wysocki" <rafael@...nel.org>,
        Len Brown <len.brown@...el.com>, Pavel Machek <pavel@....cz>,
        Sudeep Holla <sudeep.holla@....com>,
        Pierre Gondois <pierre.gondois@....com>,
        "Yuan, Perry" <perry.yuan@....com>, Huang Rui <ray.huang@....com>,
        Stable <stable@...r.kernel.org>,
        Oleksandr Natalenko <oleksandr@...alenko.name>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        "H. Peter Anvin" <hpa@...or.com>,
        Linux PM <linux-pm@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ACPI: CPPC: Fix enabling CPPC on AMD systems with shared memory

On Wed, Jul 13, 2022 at 7:54 PM Mario Limonciello
<mario.limonciello@....com> wrote:
>
> When commit 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all
> and when CPPC_LIB is supported") was introduced, we found collateral
> damage that a number of AMD systems that supported CPPC but
> didn't advertise support in _OSC stopped having a functional
> amd-pstate driver. The _OSC was only enforced on Intel systems at that
> time.
>
> This was fixed for the MSR based designs by commit 8b356e536e69f
> ("ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported")
> but some shared memory based designs also support CPPC but haven't
> advertised support in the _OSC.  Add support for those designs as well by
> hardcoding the list of systems.
>
> Fixes: 72f2ecb7ece7 ("ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported")
> Fixes: 8b356e536e69f ("ACPI: CPPC: Don't require _OSC if X86_FEATURE_CPPC is supported")
> Link: https://lore.kernel.org/all/3559249.JlDtxWtqDm@natalenko.name/
> Cc: stable@...r.kernel.org # 5.18
> Reported-and-tested-by: Oleksandr Natalenko <oleksandr@...alenko.name>
> Signed-off-by: Mario Limonciello <mario.limonciello@....com>
> ---
>  arch/x86/kernel/acpi/cppc.c | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c
> index 734b96454896..8d8752b44f11 100644
> --- a/arch/x86/kernel/acpi/cppc.c
> +++ b/arch/x86/kernel/acpi/cppc.c
> @@ -16,6 +16,12 @@ bool cpc_supported_by_cpu(void)
>         switch (boot_cpu_data.x86_vendor) {
>         case X86_VENDOR_AMD:
>         case X86_VENDOR_HYGON:
> +               if (boot_cpu_data.x86 == 0x19 && ((boot_cpu_data.x86_model <= 0x0f) ||
> +                   (boot_cpu_data.x86_model >= 0x20 && boot_cpu_data.x86_model <= 0x2f)))
> +                       return true;
> +               else if (boot_cpu_data.x86 == 0x17 &&
> +                        boot_cpu_data.x86_model >= 0x70 && boot_cpu_data.x86_model <= 0x7f)
> +                       return true;
>                 return boot_cpu_has(X86_FEATURE_CPPC);
>         }
>         return false;
> --

Applied as 5.19-rc material, thanks!