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Message-ID: <CAOX2RU6YxjN3XCRSsih7cpO6H1JvXLMG7=PNmzrbk+_Ksx8x-g@mail.gmail.com>
Date: Wed, 13 Jul 2022 22:47:06 +0200
From: Robert Marko <robimarko@...il.com>
To: Bjorn Andersson <bjorn.andersson@...aro.org>
Cc: Andy Gross <agross@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Jassi Brar <jassisinghbrar@...il.com>,
Rob Herring <robh+dt@...nel.org>,
krzysztof.kozlowski+dt@...aro.org,
linux-arm-msm <linux-arm-msm@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>,
Devicetree List <devicetree@...r.kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Subject: Re: [PATCH v6 2/4] mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock
controller support
On Wed, 13 Jul 2022 at 22:44, Bjorn Andersson
<bjorn.andersson@...aro.org> wrote:
>
> On Thu 07 Jul 12:37 CDT 2022, Robert Marko wrote:
>
> > IPQ8074 has the APSS clock controller utilizing the same register space as
> > the APCS, so provide access to the APSS utilizing a child device like
> > IPQ6018 does as well, but just by utilizing the IPQ8074 specific APSS
> > clock driver.
> >
> > Signed-off-by: Robert Marko <robimarko@...il.com>
>
> Reviewed-by: Bjorn Andersson <bjorn.andersson@...aro.org>
Bjorn, please ignore the v6 series, a way simplified and better
support is in the v8 series.
Which is mostly reviewed, only DTS is pending.
Regards,
Robert
>
> Regards,
> Bjorn
>
> > ---
> > Changes in v6:
> > * Adjust max_register value using match data instead of globally
> >
> > Changes in v5:
> > * Use lower case hex for max_register
> > * Update the APSS clock name to match the new one without commas
> > ---
> > drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++++-
> > 1 file changed, 7 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
> > index c05f3276d02c..5d6b41fa6256 100644
> > --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
> > +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
> > @@ -34,6 +34,12 @@ static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
> > .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
> > };
> >
> > +static const struct qcom_apcs_ipc_data ipq8074_apcs_data = {
> > + .offset = 8,
> > + .max_register = 0x5ffc,
> > + .clk_name = "qcom-apss-ipq8074-clk"
> > +};
> > +
> > static const struct qcom_apcs_ipc_data msm8916_apcs_data = {
> > .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
> > };
> > @@ -148,7 +154,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev)
> > /* .data is the offset of the ipc register within the global block */
> > static const struct of_device_id qcom_apcs_ipc_of_match[] = {
> > { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
> > - { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data },
> > + { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data },
> > { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
> > { .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data },
> > { .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
> > --
> > 2.36.1
> >
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