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Date:   Wed, 13 Jul 2022 21:10:28 +0000
From:   <Lewis.Hanly@...rochip.com>
To:     <andy.shevchenko@...il.com>, <Conor.Dooley@...rochip.com>,
        <Lewis.Hanly@...rochip.com>
CC:     <linux-riscv@...ts.infradead.org>, <brgl@...ev.pl>,
        <linux-gpio@...r.kernel.org>, <linus.walleij@...aro.org>,
        <palmer@...belt.com>, <maz@...nel.org>,
        <linux-kernel@...r.kernel.org>, <Daire.McNamara@...rochip.com>
Subject: Re: [PATCH v2 1/1] gpio: mpfs: add polarfire soc gpio support

On Wed, 2022-07-13 at 19:50 +0200, Andy Shevchenko wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
> 
> On Wed, Jul 13, 2022 at 7:44 PM <Conor.Dooley@...rochip.com> wrote:
> > On 13/07/2022 12:59, Andy Shevchenko wrote:
> > > EXTERNAL EMAIL: Do not click links or open attachments unless you
> > > know the content is safe
> 
> ...
> 
> > > > +#define BYTE_BOUNDARY                  0x04
> > > 
> > > Without namespace?
> > 
> > Does byte_boundary even need to be defined?
> > is incrementing an address by 0x4 not kinda obvious on its own
> > as to what it is doing?
> 
> The less magic is the better.
> 
> Btw, have you considered gpio-regmap? Can it be utilized here?
Yes I have considered regmap, our register map is not mapped out to
fully utilize regmap. We could use for one/two registers but not fully.
> 
> --
> With Best Regards,
> Andy Shevchenko

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