| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20220713042223.1458-1-nandhini.srikandan@intel.com>
Date: Wed, 13 Jul 2022 12:22:19 +0800
From: nandhini.srikandan@...el.com
To: fancer.lancer@...il.com, broonie@...nel.org, robh+dt@...nel.org,
linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: devicetree@...r.kernel.org, mgross@...ux.intel.com,
kris.pan@...el.com, kenchappa.demakkanavar@...el.com,
furong.zhou@...el.com, mallikarjunappa.sangannavar@...el.com,
mahesh.r.vaidya@...el.com, nandhini.srikandan@...el.com,
rashmi.a@...el.com
Subject: [PATCH v6 0/4] Add support for Intel Thunder Bay SPI controller
From: Nandhini Srikandan <nandhini.srikandan@...el.com>
This patch enables support for DW SPI on Intel Thunder Bay.
This patch set also enables master mode for latest Designware SPI versions.
Patch 1: Fixed dw_spi_ip_is macro with the missing underscore.
Patch 2: DW SPI DT bindings for Intel Thunder Bay SoC.
Patch 3: Adds master mode support for Designware SPI controller.
Patch 4: Adds support for Designware SPI on Intel Thunder Bay SoC.
The driver is tested on Keem Bay and Thunder Bay evaluation board
Summary:
Changes from v5:
1) Added changelog for Patch 1.
2) Added Acked-by and Reviewed-by to applicable patches.
3) There are no other changes other than changelog in any of the patches.
Changes from v4:
1) Reordered master mode selection patch and Thunder Bay support patch.
2) The typo fix for macro dw_spi_ip_is is made into seperate patch.
Changes from v3:
1) Dropped SSTE support in this patch.
2) Rebased to the latest code.
Changes from v2:
1) SSTE support made using dt and created seperate patches.
2) SPI controller master mode selection made common to all DW SPI controllers.
3) Using a common init function for both keem bay and thunder bay.
Changes from v1:
1) Designware CR0 specific macros are named in a generic way.
2) SPI CAP macros are named in generic way rather than naming project specific.
3) SPI KEEM BAY specific macros are replaced by generic macros.
4) Resued the existing SPI deassert API instead of adding another reset.
Changes in patches:
Patch 1:
--------
Changes from v5:
1) Added changelog
Changes from v4:
1) Newly introduced in v5 as seperate patch.
Patch 2:
--------
Changes from v5/v4/v3/v2/v1:
1) No change in this patch.
Patch 3:
--------
Changes from v5:
1) No changes.
Changes from v4:
1) Reordered the patch.
2) Setting CTRLR0 BIT31 is done conditionally for 1.02a version.
Changes from v3:
1) Corrected dw_spi_ip_is macro with the missing underscore.
2) Setting CTRLR0 BIT31 without any condition check as in older version of
DW SPI controller this bit is reserved.
Changes from v2/v1:
1)Newly introduced in v3 to make master mode selection as seperate patch.
Patch 4:
--------
Changes from v5:
1) No changes.
Changes from v4:
1) Reordered the patch.
Changes from v3:
1) No changes.
Changes from v2:
1) Init function is made common for Keem Bay and Thunder Bay.
Thanks & Regards,
Nandhini
Nandhini Srikandan (4):
spi: dw: Fix IP-core versions macro
dt-bindings: spi: Add bindings for Intel Thunder Bay SOC
spi: dw: Add support for master mode selection for DWC SSI controller
spi: dw: Add support for Intel Thunder Bay SPI controller
.../devicetree/bindings/spi/snps,dw-apb-ssi.yaml | 2 ++
drivers/spi/spi-dw-core.c | 5 +++--
drivers/spi/spi-dw-mmio.c | 8 ++++----
drivers/spi/spi-dw.h | 13 +++----------
4 files changed, 12 insertions(+), 16 deletions(-)
--
2.17.1
Powered by blists - more mailing lists