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Message-Id: <20220713042223.1458-5-nandhini.srikandan@intel.com>
Date: Wed, 13 Jul 2022 12:22:23 +0800
From: nandhini.srikandan@...el.com
To: fancer.lancer@...il.com, broonie@...nel.org, robh+dt@...nel.org,
linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: devicetree@...r.kernel.org, mgross@...ux.intel.com,
kris.pan@...el.com, kenchappa.demakkanavar@...el.com,
furong.zhou@...el.com, mallikarjunappa.sangannavar@...el.com,
mahesh.r.vaidya@...el.com, nandhini.srikandan@...el.com,
rashmi.a@...el.com
Subject: [PATCH v6 4/4] spi: dw: Add support for Intel Thunder Bay SPI controller
From: Nandhini Srikandan <nandhini.srikandan@...el.com>
Add support for Intel Thunder Bay SPI controller, which uses DesignWare
DWC_ssi core and also add common init function for both Keem Bay and
Thunder Bay.
Signed-off-by: Nandhini Srikandan <nandhini.srikandan@...el.com>
Acked-by: Serge Semin <fancer.lancer@...il.com>
---
drivers/spi/spi-dw-mmio.c | 8 ++++----
drivers/spi/spi-dw.h | 3 +--
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 5101c4c6017b..26c40ea6dd12 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -214,11 +214,10 @@ static int dw_spi_hssi_init(struct platform_device *pdev,
return 0;
}
-static int dw_spi_keembay_init(struct platform_device *pdev,
- struct dw_spi_mmio *dwsmmio)
+static int dw_spi_intel_init(struct platform_device *pdev,
+ struct dw_spi_mmio *dwsmmio)
{
dwsmmio->dws.ip = DW_HSSI_ID;
- dwsmmio->dws.caps = DW_SPI_CAP_KEEMBAY_MST;
return 0;
}
@@ -349,7 +348,8 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
{ .compatible = "amazon,alpine-dw-apb-ssi", .data = dw_spi_alpine_init},
{ .compatible = "renesas,rzn1-spi", .data = dw_spi_pssi_init},
{ .compatible = "snps,dwc-ssi-1.01a", .data = dw_spi_hssi_init},
- { .compatible = "intel,keembay-ssi", .data = dw_spi_keembay_init},
+ { .compatible = "intel,keembay-ssi", .data = dw_spi_intel_init},
+ { .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
{ /* end of table */}
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 8b8f924ac410..9e8eb2b52d5c 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -31,8 +31,7 @@
/* DW SPI controller capabilities */
#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
-#define DW_SPI_CAP_KEEMBAY_MST BIT(1)
-#define DW_SPI_CAP_DFS32 BIT(2)
+#define DW_SPI_CAP_DFS32 BIT(1)
/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
#define DW_SPI_CTRLR0 0x00
--
2.17.1
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