linux-kernel - RE: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu

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Message-ID: <DM4PR12MB5278D92E034820A6E33D94079C899@DM4PR12MB5278.namprd12.prod.outlook.com>
Date:   Wed, 13 Jul 2022 05:57:22 +0000
From:   "Yuan, Perry" <Perry.Yuan@....com>
To:     Viresh Kumar <viresh.kumar@...aro.org>
CC:     "rafael.j.wysocki@...el.com" <rafael.j.wysocki@...el.com>,
        "Huang, Ray" <Ray.Huang@....com>,
        "Sharma, Deepak" <Deepak.Sharma@....com>,
        "Limonciello, Mario" <Mario.Limonciello@....com>,
        "Fontenot, Nathan" <Nathan.Fontenot@....com>,
        "Deucher, Alexander" <Alexander.Deucher@....com>,
        "Su, Jinzhou (Joe)" <Jinzhou.Su@....com>,
        "Huang, Shimmer" <Shimmer.Huang@....com>,
        "Du, Xiaojian" <Xiaojian.Du@....com>,
        "Meng, Li (Jassmine)" <Li.Meng@....com>,
        "linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Rafael J. Wysocki" <rafael@...nel.org>
Subject: RE: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch cppc_req_cached
 value in amd_pstate_cpu_init()

[AMD Official Use Only - General]

Hi Viresh,

> -----Original Message-----
> From: Viresh Kumar <viresh.kumar@...aro.org>
> Sent: Wednesday, July 13, 2022 1:27 PM
> To: Yuan, Perry <Perry.Yuan@....com>
> Cc: rafael.j.wysocki@...el.com; Huang, Ray <Ray.Huang@....com>; Sharma,
> Deepak <Deepak.Sharma@....com>; Limonciello, Mario
> <Mario.Limonciello@....com>; Fontenot, Nathan
> <Nathan.Fontenot@....com>; Deucher, Alexander
> <Alexander.Deucher@....com>; Su, Jinzhou (Joe) <Jinzhou.Su@....com>;
> Huang, Shimmer <Shimmer.Huang@....com>; Du, Xiaojian
> <Xiaojian.Du@....com>; Meng, Li (Jassmine) <Li.Meng@....com>; linux-
> pm@...r.kernel.org; linux-kernel@...r.kernel.org; Rafael J. Wysocki
> <rafael@...nel.org>
> Subject: Re: [PATCH v3 04/13] cpufreq: amd-pstate: prefetch
> cppc_req_cached value in amd_pstate_cpu_init()
> 
> [CAUTION: External Email]
> 
> On 12-07-22, 11:40, Perry Yuan wrote:
> > This cppc_req_cached valued should be prefetched during
> > amd_pstate_cpu_init call period, then the amd_pstate_update() will get
> > correct cached value before updating the perf to change the cpu perf
> > level.
> 
> You are doing more than this in the patch, either mention all the stuff with
> reasoning or split into two patches.

My mistakes, the patch adds the shared_mem check which is added by another patch which is in the coming EPP driver patch set.  I will add one more patch to introduce what shared_mem is used for in V4 later. 

Thank you!

Perry. 

> 
> > Signed-off-by: Perry Yuan <Perry.Yuan@....com>
> > ---
> >  drivers/cpufreq/amd-pstate.c | 15 ++++++++++-----
> >  1 file changed, 10 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/cpufreq/amd-pstate.c
> > b/drivers/cpufreq/amd-pstate.c index 43e6df9f67f6..e4904da54541 100644
> > --- a/drivers/cpufreq/amd-pstate.c
> > +++ b/drivers/cpufreq/amd-pstate.c
> > @@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct
> cpufreq_policy *policy)
> >       cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
> >
> >       policy->driver_data = cpudata;
> > +     if (!shared_mem) {
> 
> This is a new change, which the commit log doesn't talk about.
> 
> > +             ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL,
> &value);
> > +             if (ret)
> > +                     return ret;
> > +             WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
> >
> > -     ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
> > -     if (ret)
> > -             return ret;
> > -     WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
> > -
> > +             ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
> > +             if (ret)
> > +                     return ret;
> > +             WRITE_ONCE(cpudata->cppc_req_cached, value);
> > +     }
> >       amd_pstate_boost_init(cpudata);
> >
> >       return 0;
> > --
> > 2.25.1
> 
> --
> viresh