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Message-ID: <aabe30ae3e46d2e5be2d5d81dabff05d09c7370c.camel@toradex.com>
Date: Wed, 13 Jul 2022 07:57:08 +0000
From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
To: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"linux-imx@....com" <linux-imx@....com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Andrejs Cainikovs <andrejs.cainikovs@...adex.com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"mkl@...gutronix.de" <mkl@...gutronix.de>,
"krzysztof.kozlowski+dt@...aro.org"
<krzysztof.kozlowski+dt@...aro.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Francesco Dolcini <francesco.dolcini@...adex.com>
Subject: Re: [PATCH v1 1/2] arm64: dts: imx8mm-verdin: update CAN clock to
40MHz
On Fri, 2022-07-08 at 14:42 +0200, Andrejs Cainikovs wrote:
> Update SPI CAN controller clock to match current hardware design.
>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@...adex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-
> verdin.dtsi
> index eafa88d980b3..2841c6bfe3a9 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
> @@ -32,10 +32,10 @@ backlight: backlight {
> };
>
> /* Fixed clock dedicated to SPI CAN controller */
> - clk20m: oscillator {
> + clk40m: oscillator {
> compatible = "fixed-clock";
> #clock-cells = <0>;
> - clock-frequency = <20000000>;
> + clock-frequency = <40000000>;
> };
>
> gpio-keys {
> @@ -194,7 +194,7 @@ &ecspi3 {
>
> can1: can@0 {
> compatible = "microchip,mcp251xfd";
> - clocks = <&clk20m>;
> + clocks = <&clk40m>;
> interrupts-extended = <&gpio1 6 IRQ_TYPE_EDGE_FALLING>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_can1_int>;
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