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Message-ID: <49a8be9269ee47de9fc2d0d7f09eb0b1@AcuMS.aculab.com>
Date: Wed, 13 Jul 2022 09:39:43 +0000
From: David Laight <David.Laight@...LAB.COM>
To: 'Yu-Jen Chang' <arthurchang09@...il.com>,
Andrey Semashev <andrey.semashev@...il.com>
CC: "andy@...nel.org" <andy@...nel.org>,
"akinobu.mita@...il.com" <akinobu.mita@...il.com>,
Ching-Chun Huang <jserv@...s.ncku.edu.tw>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 2/2] lib/string.c: Optimize memchr()
From: Yu-Jen Chang
> Sent: 12 July 2022 15:59
...
> > I think you're missing the point. Loads at unaligned addresses may not
> > be allowed by hardware using conventional load instructions or may be
> > inefficient. Given that this memchr implementation is used as a fallback
> > when no hardware-specific version is available, you should be
> > conservative wrt. hardware capabilities and behavior. You should
> > probably have a pre-alignment loop.
>
> Got it. I add pre-alignment loop. It aligns the address to 8 or 4bytes.
That should be predicated on !HAS_EFFICIENT_UNALIGNED_ACCESS.
...
> for (; p <= end - 8; p += 8) {
> val = *(u64*)p ^ mask;
> if ((val + 0xfefefefefefefeffull)
> & (~val & 0x8080808080808080ull))
> break;
I would add a couple of comments, like:
// Convert to check for zero byte.
// Standard check for a zero byte in a word.
(But not the big 4 line explanation you had.
It is also worth looking at how that code compiles
on 32bit arch that don't have a carry flag.
That is everything based on MIPS, including riscv.
David
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