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Message-ID: <0c1da7b8-1be0-76a9-f613-ef307bac4e36@intel.com>
Date:   Wed, 13 Jul 2022 16:29:18 +0300
From:   Adrian Hunter <adrian.hunter@...el.com>
To:     Daniil Lunev <dlunev@...omium.org>
Cc:     Avri Altman <avri.altman@....com>,
        Bart Van Assche <bvanassche@....org>,
        Bean Huo <beanhuo@...ron.com>,
        "James E.J. Bottomley" <jejb@...ux.ibm.com>,
        "Martin K. Petersen" <martin.petersen@...cle.com>,
        linux-kernel@...r.kernel.org, linux-scsi@...r.kernel.org
Subject: Re: [PATCH] scsi: ufs: ufs-pci: default clock frequency for Intel's
 UFS controller

On 8/07/22 07:17, Daniil Lunev wrote:
> ARM platforms rely on 'ref_clk' of a UFS controller's node in DTS to set
> up the proper bRefClkFreq for the UFS storage device. The facility is
> not available on x86. To circumvene that, default the parameter,
> responsible for carrying the value to the UFS storage device
> initialization, to the one that Intel's controllers support. This is
> required to support provisioning of UFS storage devices from userspace,
> without relying on FW and/or bootloader to make the necessary
> preparations.
> 
> Signed-off-by: Daniil Lunev <dlunev@...omium.org>
> ---
> 
>  drivers/ufs/host/ufshcd-pci.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/ufs/host/ufshcd-pci.c b/drivers/ufs/host/ufshcd-pci.c
> index 04166bda41daa..a6f9222cbea74 100644
> --- a/drivers/ufs/host/ufshcd-pci.c
> +++ b/drivers/ufs/host/ufshcd-pci.c
> @@ -336,6 +336,7 @@ static int ufs_intel_common_init(struct ufs_hba *hba)
>  	struct intel_host *host;
>  
>  	hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND;
> +	hba->dev_ref_clk_freq = REF_CLK_FREQ_19_2_MHZ;

I have seen requirement documents saying 19.2 or 38.4, so this is would
be a problem since it overwrites the value even if it has been set correctly
to something other than 19.2 MHz.

>  
>  	host = devm_kzalloc(hba->dev, sizeof(*host), GFP_KERNEL);
>  	if (!host)

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