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Message-ID: <94dad704-d81a-7dc2-423d-1f728bcb5548@riseup.net>
Date: Thu, 14 Jul 2022 16:20:06 -0300
From: André Almeida <andrealmeid@...eup.net>
To: Alex Deucher <alexdeucher@...il.com>,
Maíra Canal <mairacanal@...eup.net>
Cc: Magali Lemes <magalilemes00@...il.com>,
David Airlie <airlied@...ux.ie>,
Tales Lelo da Aparecida <tales.aparecida@...il.com>,
xinhui pan <Xinhui.Pan@....com>,
Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
LKML <linux-kernel@...r.kernel.org>,
amd-gfx list <amd-gfx@...ts.freedesktop.org>,
Christian Koenig <christian.koenig@....com>,
Melissa Wen <mwen@...lia.com>, Leo Li <sunpeng.li@....com>,
Dmytro Laktyushkin <Dmytro.Laktyushkin@....com>,
Aurabindo Pillai <aurabindo.pillai@....com>,
Daniel Vetter <daniel@...ll.ch>,
Alex Deucher <alexander.deucher@....com>,
Isabella Basso <isabbasso@...eup.net>,
Harry Wentland <harry.wentland@....com>,
Nicholas Kazlauskas <nicholas.kazlauskas@....com>,
André Almeida <andrealmeid@...lia.com>
Subject: Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register
Às 16:14 de 14/07/22, Alex Deucher escreveu:
> On Thu, Jul 14, 2022 at 3:05 PM André Almeida <andrealmeid@...lia.com> wrote:
>>
>> Hi Maíra,
>>
>> Thank you for your patch,
>>
>> Às 13:44 de 14/07/22, Maíra Canal escreveu:
>>> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
>>> should be written into the control register instead of 0.
>>>
>>
>> Why? I do see that tmp was unused before your patch, but why should we
>> write it into this register? Did you manage to test this somehow?
>
> The patch is correct. We should only be clearing the enable bit in
> this case, not the entire register. Clearing the other fields could
> cause spurious hotplug events as it affects the short and long pulse
> times for the HPD pin.
>
Got it, nice catch Maíra :) Next time, please add this kind of
information in the commit message.
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