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Message-ID: <YtB2xJdsOHSJV7Py@worktop.programming.kicks-ass.net>
Date: Thu, 14 Jul 2022 22:04:20 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: Daniel Sneddon <daniel.sneddon@...ux.intel.com>
Cc: Jonathan Corbet <corbet@....net>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" <x86@...nel.org>,
pawan.kumar.gupta@...ux.intel.com,
antonio.gomez.iglesias@...ux.intel.com,
"H. Peter Anvin" <hpa@...or.com>,
"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86/speculation: Add BHI_DIS support
On Thu, Jul 14, 2022 at 12:52:35PM -0700, Daniel Sneddon wrote:
> Branch History Injection (BHI) attacks can be mitigated using the
> BHI_DIS_S indirect predictor control bit located in MSR_IA32_SPEC_CTRL
> register. Set BHI_DIS in MSR_IA32_SPC_CTRL to prevent predicted
> targets of indirect branches executed in CPL0, CPL1, or CPL2 from
> being selected based on branch history from branches executed in CPL3.
> Support for this feature is enumerated by CPUID.7.2.EDX[BHI_CTRL] (bit 4).
What actual hardware will have this?
> Users wanting BHI protection can specify spectre_v2=eibrs,bhi_dis to
> enable hardware BHI protections. On platforms where BHI protections
> are not available in the hardware revert to eibrs,retpoline
> mitigations.
AFAICT this doesn't get auto-selected; how bad is performance for this
to not be so?
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