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Message-ID: <54b0e279-5eac-b304-05d0-9bc64a94cbd3@linaro.org>
Date: Thu, 14 Jul 2022 14:06:42 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Tianfei Zhang <tianfei.zhang@...el.com>, ssantosh@...nel.org
Cc: trix@...hat.com, yilun.xu@...el.com, russell.h.weight@...el.com,
linux-fpga@...r.kernel.org, linux-kernel@...r.kernel.org,
matthew.gerlach@...ux.intel.com,
Debarati Biswas <debaratix.biswas@...el.com>
Subject: Re: [PATCH v2] memory: dfl-emif: Update the dfl emif driver support
revision 1
On 13/07/2022 15:03, Tianfei Zhang wrote:
> From: Debarati Biswas <debaratix.biswas@...el.com>
>
> The next generation (revision 1) of the DFL EMIF feature device requires
> support for more than 4 memory banks. It does not support the selective
> clearing of memory banks. A capability register replaces the previous
> control register, and contains a bitmask to indicate the presence of each
> memory bank. This bitmask aligns with the previous control register
> bitmask that served the same purpose. The control and capability
> registers are treated like a C Union structure in order to support both
> the new and old revisions of the EMIF device.
>
> Signed-off-by: Debarati Biswas <debaratix.biswas@...el.com>
> Signed-off-by: Russ Weight <russell.h.weight@...el.com>
> Signed-off-by: Tianfei Zhang <tianfei.zhang@...el.com>
> ---
Thanks for the patch and for the review.
It is too late in the cycle for me to pick it up. I will take it after
the merge window.
Best regards,
Krzysztof
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