lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Thu, 14 Jul 2022 13:06:26 +0100 From: Mauro Carvalho Chehab <mchehab@...nel.org> To: unlisted-recipients:; (no To-header on input) Cc: Mauro Carvalho Chehab <mchehab@...nel.org>, Daniel Vetter <daniel@...ll.ch>, Daniele Ceraolo Spurio <daniele.ceraolospurio@...el.com>, David Airlie <airlied@...ux.ie>, Jani Nikula <jani.nikula@...ux.intel.com>, John Harrison <John.C.Harrison@...el.com>, Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>, Matthew Brost <matthew.brost@...el.com>, Michal Wajdeczko <michal.wajdeczko@...el.com>, Prathap Kumar Valsan <prathap.kumar.valsan@...el.com>, Rodrigo Vivi <rodrigo.vivi@...el.com>, Tvrtko Ursulin <tvrtko.ursulin@...ux.intel.com>, Umesh Nerlige Ramappa <umesh.nerlige.ramappa@...el.com>, Vinay Belgaumkar <vinay.belgaumkar@...el.com>, dri-devel@...ts.freedesktop.org, intel-gfx@...ts.freedesktop.org, linux-kernel@...r.kernel.org Subject: [PATCH v2 21/21] drm/i915/guc: document TLB cache invalidation functions Add documentation for the kAPI functions that do TLB cache invalidation via GuC. Signed-off-by: Mauro Carvalho Chehab <mchehab@...nel.org> --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mchehab@kernel.org/ drivers/gpu/drm/i915/gt/uc/intel_guc.c | 52 ++++++++++++++++++++++---- 1 file changed, 45 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 98260a7bc90b..173833bc3a62 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -923,7 +923,14 @@ static int guc_send_invalidate_tlb(struct intel_guc *guc, u32 *action, u32 size) return err; } - /* Full TLB invalidation */ +/** + * intel_guc_invalidate_tlb_full - GuC full TLB invalidation + * + * @guc: the guc + * @mode: mode of TLB cache invalidation (heavy or lite) + * + * Use GuC to do a full TLB cache invalidation if supported. + */ int intel_guc_invalidate_tlb_full(struct intel_guc *guc, enum intel_guc_tlb_inval_mode mode) { @@ -943,8 +950,17 @@ int intel_guc_invalidate_tlb_full(struct intel_guc *guc, return guc_send_invalidate_tlb(guc, action, ARRAY_SIZE(action)); } -/* - * Selective TLB Invalidation for Address Range: +/** + * intel_guc_invalidate_tlb_page_selective - GuC selective TLB invalidation + * for an address range + * + * @guc: the guc + * @mode: mode of TLB cache invalidation (heavy or lite) + * @start: range start + * @length: range length + * + * Use GuC to do a selective TLB invalidation if supported. + * * TLB's in the Address Range is Invalidated across all engines. */ int intel_guc_invalidate_tlb_page_selective(struct intel_guc *guc, @@ -978,8 +994,18 @@ int intel_guc_invalidate_tlb_page_selective(struct intel_guc *guc, return guc_send_invalidate_tlb(guc, action, ARRAY_SIZE(action)); } -/* - * Selective TLB Invalidation for Context: +/** + * intel_guc_invalidate_tlb_page_selective_ctx - GuC selective TLB + * invalidation for a context + * + * @guc: the guc + * @mode: mode of TLB cache invalidation (heavy or lite) + * @start: range start + * @length: range length + * @ctxid: context ID + * + * Use GuC to do a selective TLB invalidation on a context if supported. + * * Invalidates all TLB's for a specific context across all engines. */ int intel_guc_invalidate_tlb_page_selective_ctx(struct intel_guc *guc, @@ -1013,8 +1039,13 @@ int intel_guc_invalidate_tlb_page_selective_ctx(struct intel_guc *guc, return guc_send_invalidate_tlb(guc, action, ARRAY_SIZE(action)); } -/* - * Guc TLB Invalidation: Invalidate the TLB's of GuC itself. +/** + * intel_guc_invalidate_tlb_guc - GuC self TLB invalidation + * + * @guc: the guc + * @mode: mode of TLB cache invalidation (heavy or lite) + * + * Use GuC to invalidate the TLB's of GuC itself. */ int intel_guc_invalidate_tlb_guc(struct intel_guc *guc, enum intel_guc_tlb_inval_mode mode) @@ -1035,6 +1066,13 @@ int intel_guc_invalidate_tlb_guc(struct intel_guc *guc, return guc_send_invalidate_tlb(guc, action, ARRAY_SIZE(action)); } +/** + * intel_guc_invalidate_tlb_all - GuC global TLB invalidation + * + * @guc: the guc + * + * Use GuC to do a complete TLB invalidation on all tables + */ int intel_guc_invalidate_tlb_all(struct intel_guc *guc) { u32 action[] = { -- 2.36.1
Powered by blists - more mailing lists