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Date: Thu, 14 Jul 2022 20:28:33 +0800 From: Tinghan Shen <tinghan.shen@...iatek.com> To: Yong Wu <yong.wu@...iatek.com>, Joerg Roedel <joro@...tes.org>, "Will Deacon" <will@...nel.org>, Rob Herring <robh+dt@...nel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@...aro.org>, Lee Jones <lee.jones@...aro.org>, Matthias Brugger <matthias.bgg@...il.com>, "Tinghan Shen" <tinghan.shen@...iatek.com>, Chun-Jie Chen <chun-jie.chen@...iatek.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, "MandyJH Liu" <mandyjh.liu@...iatek.com>, Weiyi Lu <weiyi.lu@...iatek.com> CC: <iommu@...ts.linux.dev>, <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>, <Project_Global_Chrome_Upstream_Group@...iatek.com>, YC Hung <yc.hung@...iatek.corp-partner.google.com>, Allen-KH Cheng <allen-kh.cheng@...iatek.corp-partner.google.com> Subject: [PATCH v2 15/19] arm64: dts: mt8195: Add adsp node and adsp mailbox nodes From: YC Hung <yc.hung@...iatek.corp-partner.google.com> Add adsp node and adsp mailbox nodes for mt8195. Signed-off-by: YC Hung <yc.hung@...iatek.corp-partner.google.com> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.corp-partner.google.com> Signed-off-by: Tinghan Shen <tinghan.shen@...iatek.com> --- arch/arm64/boot/dts/mediatek/mt8195.dtsi | 37 ++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index 818f7dea27c6..9cb68417c550 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -739,6 +739,43 @@ #clock-cells = <1>; }; + adsp: adsp@...03000 { + compatible = "mediatek,mt8195-dsp"; + reg = <0 0x10803000 0 0x1000>, + <0 0x10840000 0 0x40000>; + reg-names = "cfg", "sram"; + clocks = <&topckgen CLK_TOP_ADSP>, + <&clk26m>, + <&topckgen CLK_TOP_AUDIO_LOCAL_BUS>, + <&topckgen CLK_TOP_MAINPLL_D7_D2>, + <&scp_adsp CLK_SCP_ADSP_AUDIODSP>, + <&topckgen CLK_TOP_AUDIO_H>; + clock-names = "adsp_sel", + "clk26m_ck", + "audio_local_bus", + "mainpll_d7_d2", + "scp_adsp_audiodsp", + "audio_h"; + power-domains = <&spm MT8195_POWER_DOMAIN_ADSP>; + mbox-names = "rx", "tx"; + mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>; + status = "disabled"; + }; + + adsp_mailbox0: mailbox@...16000 { + compatible = "mediatek,mt8195-adsp-mbox"; + #mbox-cells = <0>; + reg = <0 0x10816000 0 0x1000>; + interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>; + }; + + adsp_mailbox1: mailbox@...17000 { + compatible = "mediatek,mt8195-adsp-mbox"; + #mbox-cells = <0>; + reg = <0 0x10817000 0 0x1000>; + interrupts = <GIC_SPI 703 IRQ_TYPE_LEVEL_HIGH 0>; + }; + afe: mt8195-afe-pcm@...90000 { compatible = "mediatek,mt8195-audio"; reg = <0 0x10890000 0 0x10000>; -- 2.18.0
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