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Message-Id: <20220715215954.1449214-46-sean.anderson@seco.com>
Date: Fri, 15 Jul 2022 17:59:52 -0400
From: Sean Anderson <sean.anderson@...o.com>
To: "David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Madalin Bucur <madalin.bucur@....com>, netdev@...r.kernel.org
Cc: Paolo Abeni <pabeni@...hat.com>,
Eric Dumazet <edumazet@...gle.com>,
linux-arm-kernel@...ts.infradead.org,
Russell King <linux@...linux.org.uk>,
linux-kernel@...r.kernel.org,
Sean Anderson <sean.anderson@...o.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Li Yang <leoyang.li@....com>, Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>, devicetree@...r.kernel.org
Subject: [PATCH net-next v3 45/47] arm64: dts: ls1088a: Add serdes bindings
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson <sean.anderson@...o.com>
---
Changes in v3:
- New
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 96 +++++++++++++++++++
1 file changed, 96 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index f476b7d8b056..987892bc69d7 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -238,6 +238,102 @@ reset: syscon@...0000 {
reg = <0x0 0x1e60000 0x0 0x10000>;
};
+ serdes1: phy@...0000 {
+ #clock-cells = <1>;
+ #phy-cells = <1>;
+ compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
+ reg = <0x0 0x1ea0000 0x0 0x2000>;
+ status = "disabled";
+
+ pccr-8 {
+ fsl,pccr = <0x8>;
+
+ /* SG3 */
+ sgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "sgmii";
+ };
+
+ /* SG7 */
+ sgmii-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ fsl,proto = "sgmii";
+ };
+
+ /* SG1 */
+ sgmii-2 {
+ fsl,index = <2>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <1>;
+ fsl,proto = "sgmii25";
+ };
+
+ /* SG2 */
+ sgmii-3 {
+ fsl,index = <3>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "sgmii25";
+ };
+ };
+
+ pccr-9 {
+ fsl,pccr = <0x9>;
+
+ /* QSGa */
+ qsgmii-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <3>;
+ fsl,proto = "qsgmii";
+ };
+
+ /* QSGb */
+ qsgmii-1 {
+ fsl,index = <1>;
+ fsl,proto = "qsgmii";
+
+ cfg-1 {
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <2>;
+ };
+
+ cfg-2 {
+ fsl,cfg = <0x2>;
+ fsl,first-lane = <0>;
+ };
+ };
+ };
+
+ pccr-b {
+ fsl,pccr = <0xb>;
+
+ /* XFI1 */
+ xfi-0 {
+ fsl,index = <0>;
+ fsl,cfg = <0x1>;
+ /*
+ * Table 23-1 and section 23.5.16.4
+ * disagree; this reflects the table
+ */
+ fsl,first-lane = <1>;
+ fsl,proto = "xfi";
+ };
+
+ /* XFI2 */
+ xfi-1 {
+ fsl,index = <1>;
+ fsl,cfg = <0x1>;
+ fsl,first-lane = <0>;
+ fsl,proto = "xfi";
+ };
+ };
+ };
+
isc: syscon@...0000 {
compatible = "fsl,ls1088a-isc", "syscon";
reg = <0x0 0x1f70000 0x0 0x10000>;
--
2.35.1.1320.gc452695387.dirty
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