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Message-ID: <CAPv3WKdS-ocj_1uMC-aaw_QQ01FCb2xs-FyV2HHRG_Epd6V0CA@mail.gmail.com>
Date: Fri, 15 Jul 2022 10:34:04 +0200
From: Marcin Wojtas <mw@...ihalf.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
netdev <netdev@...r.kernel.org>, Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Grzegorz Jaszczyk <jaz@...ihalf.com>,
Tomasz Nowicki <tn@...ihalf.com>
Subject: Re: [net-next: PATCH] net: dsa: mv88e6xxx: fix speed setting for
CPU/DSA ports
Hi Russell,
czw., 14 lip 2022 o 21:44 Russell King (Oracle)
<linux@...linux.org.uk> napisał(a):
>
> On Thu, Jul 14, 2022 at 07:18:57PM +0200, Marcin Wojtas wrote:
> > Hi Russell,
> >
> > czw., 14 lip 2022 o 14:32 Russell King (Oracle)
> > <linux@...linux.org.uk> napisał(a):
> > >
> > > On Thu, Jul 14, 2022 at 03:00:21AM +0200, Marcin Wojtas wrote:
> > > > Commit 3c783b83bd0f ("net: dsa: mv88e6xxx: get rid of SPEED_MAX setting")
> > > > stopped relying on SPEED_MAX constant and hardcoded speed settings
> > > > for the switch ports and rely on phylink configuration.
> > > >
> > > > It turned out, however, that when the relevant code is called,
> > > > the mac_capabilites of CPU/DSA port remain unset.
> > > > mv88e6xxx_setup_port() is called via mv88e6xxx_setup() in
> > > > dsa_tree_setup_switches(), which precedes setting the caps in
> > > > phylink_get_caps down in the chain of dsa_tree_setup_ports().
> > > >
> > > > As a result the mac_capabilites are 0 and the default speed for CPU/DSA
> > > > port is 10M at the start. To fix that execute phylink_get_caps() callback
> > > > which fills port's mac_capabilities before they are processed.
> > > >
> > > > Fixes: 3c783b83bd0f ("net: dsa: mv88e6xxx: get rid of SPEED_MAX setting")
> > > > Signed-off-by: Marcin Wojtas <mw@...ihalf.com>
> > >
> > > Please don't merge this - the plan is to submit the RFC series I sent on
> > > Wednesday which deletes this code, and I'd rather not re-spin the series
> > > and go through the testing again because someone else changed the code.
> >
> > Thank for the heads-up. Are you planning to resend the series or
> > willing to get it merged as-is? I have perhaps one comment, but I can
> > apply it later as a part of fwnode_/device_ migration.
> >
> > >
> > > Marcin - please can you test with my RFC series, which can be found at:
> > >
> > > https://lore.kernel.org/all/Ys7RdzGgHbYiPyB1@shell.armlinux.org.uk/
> > >
> >
> > The thing is my v2 of DSA fwnode_/device_ migration is tested and
> > ready to send. There will be conflicts (rather easy) with your
> > patchset - I volunteer to resolve it this way or another, depending on
> > what lands first. I have 2 platforms to test it with + also ACPI case
> > locally.
> >
> > I'd like to make things as smooth as possible and make it before the
> > upcoming merge window - please share your thoughts on this.
>
> I've also been trying to get the mv88e6xxx PCS conversion in, but
> it's been held up because there's a fundamental problem in DSA that
> this series is addressing.
>
> This series is addressing a faux pas on my part, where I had forgotten
> that phylink doesn't get used in DSA unless firmware specifies a
> fixed-link (or a PHY) - in other words when the firmware lacks a
> description of the link.
>
> So, what do we do...
>
Ok, thanks. I tested your patchset in 2 setups with multiple
combinations - all worked fine, so this patch can be abandoned.
I already rebased my series on top of yours, so I'll submit my v2 this way.
Best regards,
Marcin
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