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Message-ID: <a932c154772f2121794a5f2eded1a11013114711.1657846269.git.pawan.kumar.gupta@linux.intel.com>
Date: Thu, 14 Jul 2022 18:30:18 -0700
From: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
To: Jonathan Corbet <corbet@....net>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
"H. Peter Anvin" <hpa@...or.com>
Cc: linux-doc@...r.kernel.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org, tony.luck@...el.com,
antonio.gomez.iglesias@...ux.intel.com,
Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
andrew.cooper3@...rix.com, Josh Poimboeuf <jpoimboe@...nel.org>
Subject: [RESEND RFC PATCH] x86/bugs: Add "unknown" reporting for MMIO Stale
Data
Older CPUs beyond its Servicing period are not listed in the affected
processor list for MMIO Stale Data vulnerabilities. These CPUs currently
report "Not affected" in sysfs, which may not be correct.
Add support for "Unknown" reporting for such CPUs. Mitigation is not
deployed when the status is "Unknown".
"CPU is beyond its Servicing period" means these CPUs are beyond their
Servicing [1] period and have reached End of Servicing Updates (ESU) [2].
[1] Servicing: The process of providing functional and security
updates to Intel processors or platforms, utilizing the Intel Platform
Update (IPU) process or other similar mechanisms.
[2] End of Servicing Updates (ESU): ESU is the date at which Intel
will no longer provide Servicing, such as through IPU or other similar
update processes. ESU dates will typically be aligned to end of
quarter.
Suggested-by: Andrew Cooper <andrew.cooper3@...rix.com>
Suggested-by: Tony Luck <tony.luck@...el.com>
Fixes: 8d50cdf8b834 ("x86/speculation/mmio: Add sysfs reporting for Processor MMIO Stale Data")
Cc: stable@...r.kernel.org
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>
---
CPU vulnerability is unknown if, hardware doesn't set the immunity bits
and CPU is not in the known-affected-list.
In order to report the unknown status, this patch sets the MMIO bug
for all Intel CPUs that don't have the hardware immunity bits set.
Based on the known-affected-list of CPUs, mitigation selection then
deploys the mitigation or sets the "Unknown" status; which is ugly.
I will appreciate suggestions to improve this.
Thanks,
Pawan
.../hw-vuln/processor_mmio_stale_data.rst | 3 +++
arch/x86/kernel/cpu/bugs.c | 11 +++++++-
arch/x86/kernel/cpu/common.c | 26 +++++++++++++------
arch/x86/kernel/cpu/cpu.h | 1 +
4 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst b/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst
index 9393c50b5afc..55524e0798da 100644
--- a/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst
+++ b/Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst
@@ -230,6 +230,9 @@ The possible values in this file are:
* - 'Mitigation: Clear CPU buffers'
- The processor is vulnerable and the CPU buffer clearing mitigation is
enabled.
+ * - 'Unknown: CPU is beyond its Servicing period'
+ - The processor vulnerability status is unknown because it is
+ out of Servicing period. Mitigation is not attempted.
If the processor is vulnerable then the following information is appended to
the above information:
diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
index 0dd04713434b..dd6e78d370bc 100644
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -416,6 +416,7 @@ enum mmio_mitigations {
MMIO_MITIGATION_OFF,
MMIO_MITIGATION_UCODE_NEEDED,
MMIO_MITIGATION_VERW,
+ MMIO_MITIGATION_UNKNOWN,
};
/* Default mitigation for Processor MMIO Stale Data vulnerabilities */
@@ -426,12 +427,18 @@ static const char * const mmio_strings[] = {
[MMIO_MITIGATION_OFF] = "Vulnerable",
[MMIO_MITIGATION_UCODE_NEEDED] = "Vulnerable: Clear CPU buffers attempted, no microcode",
[MMIO_MITIGATION_VERW] = "Mitigation: Clear CPU buffers",
+ [MMIO_MITIGATION_UNKNOWN] = "Unknown: CPU is beyond its servicing period",
};
static void __init mmio_select_mitigation(void)
{
u64 ia32_cap;
+ if (mmio_stale_data_unknown()) {
+ mmio_mitigation = MMIO_MITIGATION_UNKNOWN;
+ return;
+ }
+
if (!boot_cpu_has_bug(X86_BUG_MMIO_STALE_DATA) ||
cpu_mitigations_off()) {
mmio_mitigation = MMIO_MITIGATION_OFF;
@@ -1638,6 +1645,7 @@ void cpu_bugs_smt_update(void)
pr_warn_once(MMIO_MSG_SMT);
break;
case MMIO_MITIGATION_OFF:
+ case MMIO_MITIGATION_UNKNOWN:
break;
}
@@ -2235,7 +2243,8 @@ static ssize_t tsx_async_abort_show_state(char *buf)
static ssize_t mmio_stale_data_show_state(char *buf)
{
- if (mmio_mitigation == MMIO_MITIGATION_OFF)
+ if (mmio_mitigation == MMIO_MITIGATION_OFF ||
+ mmio_mitigation == MMIO_MITIGATION_UNKNOWN)
return sysfs_emit(buf, "%s\n", mmio_strings[mmio_mitigation]);
if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) {
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 736262a76a12..82088410870e 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1286,6 +1286,22 @@ static bool arch_cap_mmio_immune(u64 ia32_cap)
ia32_cap & ARCH_CAP_SBDR_SSDP_NO);
}
+bool __init mmio_stale_data_unknown(void)
+{
+ u64 ia32_cap = x86_read_arch_cap_msr();
+
+ if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
+ return false;
+ /*
+ * CPU vulnerability is unknown when, hardware doesn't set the
+ * immunity bits and CPU is not in the known affected list.
+ */
+ if (!cpu_matches(cpu_vuln_blacklist, MMIO) &&
+ !arch_cap_mmio_immune(ia32_cap))
+ return true;
+ return false;
+}
+
static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
{
u64 ia32_cap = x86_read_arch_cap_msr();
@@ -1349,14 +1365,8 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
cpu_matches(cpu_vuln_blacklist, SRBDS | MMIO_SBDS))
setup_force_cpu_bug(X86_BUG_SRBDS);
- /*
- * Processor MMIO Stale Data bug enumeration
- *
- * Affected CPU list is generally enough to enumerate the vulnerability,
- * but for virtualization case check for ARCH_CAP MSR bits also, VMM may
- * not want the guest to enumerate the bug.
- */
- if (cpu_matches(cpu_vuln_blacklist, MMIO) &&
+ /* Processor MMIO Stale Data bug enumeration */
+ if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
!arch_cap_mmio_immune(ia32_cap))
setup_force_cpu_bug(X86_BUG_MMIO_STALE_DATA);
diff --git a/arch/x86/kernel/cpu/cpu.h b/arch/x86/kernel/cpu/cpu.h
index 7c9b5893c30a..a2dbfc1bbc49 100644
--- a/arch/x86/kernel/cpu/cpu.h
+++ b/arch/x86/kernel/cpu/cpu.h
@@ -82,6 +82,7 @@ unsigned int aperfmperf_get_khz(int cpu);
extern void x86_spec_ctrl_setup_ap(void);
extern void update_srbds_msr(void);
+extern bool mmio_stale_data_unknown(void);
extern u64 x86_read_arch_cap_msr(void);
base-commit: 4a57a8400075bc5287c5c877702c68aeae2a033d
--
2.35.3
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