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Message-Id: <20220715102609.2160689-1-sudeep.holla@arm.com>
Date: Fri, 15 Jul 2022 11:26:08 +0100
From: Sudeep Holla <sudeep.holla@....com>
To: linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Conor Dooley <conor.dooley@...rochip.com>
Cc: Sudeep Holla <sudeep.holla@....com>,
Vincent Guittot <vincent.guittot@...aro.org>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Ionela Voinescu <ionela.voinescu@....com>,
Pierre Gondois <pierre.gondois@....com>,
linux-arm-kernel@...ts.infradead.org,
linux-riscv@...ts.infradead.org
Subject: [PATCH -next v2 1/2] cacheinfo: Use atomic allocation for percpu cache attributes
On couple of architectures like RISC-V and ARM64, we need to detect
cache attribues quite early during the boot when the secondary CPUs
start. So we will call detect_cache_attributes in the atomic context
and since use of normal allocation can sleep, we will end up getting
"sleeping in the atomic context" bug splat.
In order avoid that, move the allocation to use atomic version in
preparation to move the actual detection of cache attributes in the
CPU hotplug path which is atomic.
Cc: Ionela Voinescu <ionela.voinescu@....com>
Tested-by: Conor Dooley <conor.dooley@...rochip.com>
Signed-off-by: Sudeep Holla <sudeep.holla@....com>
---
drivers/base/cacheinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi Greg,
Can you apply these couple of patches directly if and when you are happy
with them ?
Regards,
Sudeep
v1->v2: This was added in v2
diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 65d566ff24c4..4b5cd08c5a65 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -356,7 +356,7 @@ int detect_cache_attributes(unsigned int cpu)
return -ENOENT;
per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
- sizeof(struct cacheinfo), GFP_KERNEL);
+ sizeof(struct cacheinfo), GFP_ATOMIC);
if (per_cpu_cacheinfo(cpu) == NULL) {
cache_leaves(cpu) = 0;
return -ENOMEM;
--
2.37.1
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