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Message-ID: <086abf6b-60ab-c0f5-e1e5-c39f0c33484c@igalia.com>
Date:   Thu, 14 Jul 2022 22:56:10 -0300
From:   André Almeida <andrealmeid@...lia.com>
To:     Maíra Canal <mairacanal@...eup.net>,
        Harry Wentland <harry.wentland@....com>,
        Leo Li <sunpeng.li@....com>,
        Rodrigo Siqueira <Rodrigo.Siqueira@....com>,
        Alex Deucher <alexander.deucher@....com>,
        christian.koenig@....com, Xinhui.Pan@....com,
        David Airlie <airlied@...ux.ie>,
        Daniel Vetter <daniel@...ll.ch>,
        Nicholas Kazlauskas <nicholas.kazlauskas@....com>,
        Dmytro Laktyushkin <Dmytro.Laktyushkin@....com>,
        Aurabindo Pillai <aurabindo.pillai@....com>
Cc:     magalilemes00@...il.com, tales.aparecida@...il.com,
        linux-kernel@...r.kernel.org, amd-gfx@...ts.freedesktop.org,
        mwen@...lia.com, Isabella Basso <isabbasso@...eup.net>,
        andrealmeid@...eup.net
Subject: Re: [PATCH 01/12] drm/amdgpu: Write masked value to control register

Às 13:44 de 14/07/22, Maíra Canal escreveu:
> On the dce_v6_0 and dce_v8_0 hpd tear down callback, the tmp variable
> should be written into the control register instead of 0.
> 
> Fixes: b00861b9 ("drm/amd/amdgpu: port of DCE v6 to new headers (v3)")
> Fixes: 2285b91c ("drm/amdgpu/dce8: simplify hpd code")
> Signed-off-by: Maíra Canal <mairacanal@...eup.net>

Series is Reviewed-by: André Almeida <andrealmeid@...lia.com>

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