[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <alpine.DEB.2.22.394.2207181228030.3963026@rhweight-WRK1>
Date: Mon, 18 Jul 2022 12:30:58 -0700 (PDT)
From: matthew.gerlach@...ux.intel.com
To: "Wu, Hao" <hao.wu@...el.com>
cc: "Xu, Yilun" <yilun.xu@...el.com>,
"Weight, Russell H" <russell.h.weight@...el.com>,
"Muddebihal, Basheer Ahmed" <basheer.ahmed.muddebihal@...el.com>,
"trix@...hat.com" <trix@...hat.com>,
"mdf@...nel.org" <mdf@...nel.org>,
"corbet@....net" <corbet@....net>,
"linux-fpga@...r.kernel.org" <linux-fpga@...r.kernel.org>,
"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Zhang, Tianfei" <tianfei.zhang@...el.com>
Subject: RE: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
documentation
On Mon, 18 Jul 2022, Wu, Hao wrote:
>> -----Original Message-----
>> From: matthew.gerlach@...ux.intel.com <matthew.gerlach@...ux.intel.com>
>> Sent: Thursday, July 7, 2022 11:06 PM
>> To: Wu, Hao <hao.wu@...el.com>; Xu, Yilun <yilun.xu@...el.com>; Weight,
>> Russell H <russell.h.weight@...el.com>; Muddebihal, Basheer Ahmed
>> <basheer.ahmed.muddebihal@...el.com>; trix@...hat.com;
>> mdf@...nel.org; corbet@....net; linux-fpga@...r.kernel.org; linux-
>> doc@...r.kernel.org; linux-kernel@...r.kernel.org; Zhang, Tianfei
>> <tianfei.zhang@...el.com>
>> Cc: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>> Subject: [PATCH v3 1/2] Documentation: fpga: dfl: add PCI Identification
>> documentation
>>
>> From: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>>
>> Add documentation on identifying FPGA based PCI cards prompted
>> by discussion on the linux-fpga@...r.kernel.org mailing list.
>>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@...ux.intel.com>
>> ---
>> v3: Add url to page tracking PCI ID information for DFL based cards.
>>
>> v2: Introduced in v2.
>> ---
>> Documentation/fpga/dfl.rst | 21 +++++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>>
>> diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
>> index 15b670926084..5144775b860a 100644
>> --- a/Documentation/fpga/dfl.rst
>> +++ b/Documentation/fpga/dfl.rst
>> @@ -507,6 +507,27 @@ ids application.
>> https://github.com/OPAE/dfl-feature-id
>>
>>
>> +PCI Device Identification
>> +================================
>> +Since FPGA based PCI cards can be reconfigured to a perform a completely
>> +new function at runtime, properly identifying such cards and binding the
>> +correct driver can be challenging. In many use cases, deployed FPGA based
>> +PCI cards are essentially static and the PCI Product ID and Vendor ID pair
>> +is sufficient to identify the card. The DFL framework helps with the
>> +dynamic case of deployed FPGA cards changing at run time by providing
>> +more detailed information about card discoverable at runtime.
>> +
>> +At one level, the DFL on a PCI card describes the function of the card.
>> +However, the same DFL could be instantiated on different physical cards.
>> +Conversely, different DFLs could be instantiated on the same physical card.
>> +Practical management of a cloud containing a heterogeneous set of such
>> cards
>> +requires a PCI level of card identification. While the PCI Product ID and
>> +Vendor ID may be sufficient to bind the dfl-pci driver, it is expected
>> +that FPGA PCI cards would advertise suitable Subsystem ID and Subsystem
>> +Vendor ID values. Further PCI Product, Vendor, and Subsystem id tracking
>> +can be found at https://github.com/OPAE/dfl-feature-id/blob/main/dfl-pci-
>> ids.rst.
>
> I feel that we may not really need this in fpga-dfl doc, as this is not describing
> any new method provided by DFL, but just something from PCI standard, right?
I think you are correct that this documentation change is not necessary.
It was useful as a mechanism for discussion, but it is really just
something from the PCI standard.
I will not include it in the v4 patch set.
>
> Thanks
> Hao
>
Powered by blists - more mailing lists