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Message-ID: <CAAhV-H6C2+LzQFB+0oVZ2NEsJrOswDXB3Th1VHneFdviC7T9EA@mail.gmail.com>
Date: Mon, 18 Jul 2022 23:19:39 +0800
From: Huacai Chen <chenhuacai@...nel.org>
To: Jianmin Lv <lvjianmin@...ngson.cn>
Cc: Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>,
LKML <linux-kernel@...r.kernel.org>, loongarch@...ts.linux.dev,
Hanjun Guo <guohanjun@...wei.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Jiaxun Yang <jiaxun.yang@...goat.com>,
Huacai Chen <chenhuacai@...ngson.cn>
Subject: Re: [PATCH V16 05/14] LoongArch: Use ACPI_GENERIC_GSI for gsi handling
Hi, Jianmin,
On Mon, Jul 18, 2022 at 10:13 PM Jianmin Lv <lvjianmin@...ngson.cn> wrote:
>
> For LoongArch, generic gsi code(driver/acpi/irq.c) can be
> reused after following patchs:
>
> APCI: irq: Add support for multiple GSI domains
> ACPI: irq: Allow acpi_gsi_to_irq() to have an arch-specific fallback
>
> So, config ACPI_GENERIC_GSI for LoongArch with removing the gsi code
> in arch directory.
>
> Signed-off-by: Jianmin Lv <lvjianmin@...ngson.cn>
> ---
> arch/loongarch/Kconfig | 1 +
> arch/loongarch/kernel/acpi.c | 65 --------------------------------------------
> 2 files changed, 1 insertion(+), 65 deletions(-)
>
> diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
> index 1920d52..7f98fc0 100644
> --- a/arch/loongarch/Kconfig
> +++ b/arch/loongarch/Kconfig
> @@ -112,6 +112,7 @@ config LOONGARCH
> select TRACE_IRQFLAGS_SUPPORT
> select USE_PERCPU_NUMA_NODE_ID
> select ZONE_DMA32
> + select ACPI_GENERIC_GSI if ACPI
Please use alpha-betical order in Kconfig, thanks.
Huacai
>
> config 32BIT
> bool
> diff --git a/arch/loongarch/kernel/acpi.c b/arch/loongarch/kernel/acpi.c
> index bb729ee..03aa145 100644
> --- a/arch/loongarch/kernel/acpi.c
> +++ b/arch/loongarch/kernel/acpi.c
> @@ -25,7 +25,6 @@
> int acpi_strict = 1; /* We have no workarounds on LoongArch */
> int num_processors;
> int disabled_cpus;
> -enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PLATFORM;
>
> u64 acpi_saved_sp;
>
> @@ -33,70 +32,6 @@
>
> #define PREFIX "ACPI: "
>
> -int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
> -{
> - if (irqp != NULL)
> - *irqp = acpi_register_gsi(NULL, gsi, -1, -1);
> - return (*irqp >= 0) ? 0 : -EINVAL;
> -}
> -EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
> -
> -int acpi_isa_irq_to_gsi(unsigned int isa_irq, u32 *gsi)
> -{
> - if (gsi)
> - *gsi = isa_irq;
> - return 0;
> -}
> -
> -/*
> - * success: return IRQ number (>=0)
> - * failure: return < 0
> - */
> -int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
> -{
> - struct irq_fwspec fwspec;
> -
> - switch (gsi) {
> - case GSI_MIN_CPU_IRQ ... GSI_MAX_CPU_IRQ:
> - fwspec.fwnode = liointc_domain->fwnode;
> - fwspec.param[0] = gsi - GSI_MIN_CPU_IRQ;
> - fwspec.param_count = 1;
> -
> - return irq_create_fwspec_mapping(&fwspec);
> -
> - case GSI_MIN_LPC_IRQ ... GSI_MAX_LPC_IRQ:
> - if (!pch_lpc_domain)
> - return -EINVAL;
> -
> - fwspec.fwnode = pch_lpc_domain->fwnode;
> - fwspec.param[0] = gsi - GSI_MIN_LPC_IRQ;
> - fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity);
> - fwspec.param_count = 2;
> -
> - return irq_create_fwspec_mapping(&fwspec);
> -
> - case GSI_MIN_PCH_IRQ ... GSI_MAX_PCH_IRQ:
> - if (!pch_pic_domain[0])
> - return -EINVAL;
> -
> - fwspec.fwnode = pch_pic_domain[0]->fwnode;
> - fwspec.param[0] = gsi - GSI_MIN_PCH_IRQ;
> - fwspec.param[1] = IRQ_TYPE_LEVEL_HIGH;
> - fwspec.param_count = 2;
> -
> - return irq_create_fwspec_mapping(&fwspec);
> - }
> -
> - return -EINVAL;
> -}
> -EXPORT_SYMBOL_GPL(acpi_register_gsi);
> -
> -void acpi_unregister_gsi(u32 gsi)
> -{
> -
> -}
> -EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
> -
> void __init __iomem * __acpi_map_table(unsigned long phys, unsigned long size)
> {
>
> --
> 1.8.3.1
>
>
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