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Date: Mon, 18 Jul 2022 11:26:00 -0400
From: Sean Anderson <sean.anderson@...o.com>
To: Piyush Mehta <piyush.mehta@....com>, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, michal.simek@...inx.com,
michal.simek@....com, robert.hancock@...ian.com,
gregkh@...uxfoundation.org, david@...t.cz
Cc: m.tretter@...gutronix.de, davem@...emloft.net,
srinivas.neeli@...inx.com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
git@...inx.com, git@....com, Piyush Mehta <piyush.mehta@...inx.com>
Subject: Re: [PATCH] arm64: dts: zynqmp: update clock property to xilinx and
dwc3 cores
On 7/18/22 10:34 AM, Piyush Mehta wrote:
> This patch updates reference clocks, for the both dwc3 (dwc3_0 and dwc3_1)
> and xilinx-cores (usb0 and usb1).
>
> Added ref_clk 'ref' property for GUCTL_REFCLKPER and GFLADJ_REFCLK_FLADJ
> calculation. This property configure correct value for SOF/ITP counter
> and period of ref_clk.
>
> Signed-off-by: Piyush Mehta <piyush.mehta@....com>
> Signed-off-by: Piyush Mehta <piyush.mehta@...inx.com>
Pick one :)
> ---
> arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 14 ++++++++++++--
> arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 6 ++++--
> 2 files changed, 16 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> index 8493dd7d5f1f..cd63b6afb3d1 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
> @@ -223,12 +223,22 @@ &uart1 {
> clocks = <&zynqmp_clk UART1_REF>, <&zynqmp_clk LPD_LSBUS>;
> };
>
> -&dwc3_0 {
> +&usb0 {
> clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> + assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
Shouldn't there be an associated assigned-clock-parents/assigned-clock-rates?
> };
>
> -&dwc3_1 {
> +&dwc3_0 {
> + clocks = <&zynqmp_clk USB3_DUAL_REF>;
> +};
> +
> +&usb1 {
> clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> + assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
> +};
> +
> +&dwc3_1 {
> + clocks = <&zynqmp_clk USB3_DUAL_REF>;
> };
> &watchdog0 {
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> index c715a18368c2..2b3e3e57380f 100644
> --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
> @@ -808,6 +808,7 @@ usb0: usb@...d0000 {
> #size-cells = <2>;
> status = "disabled";
> compatible = "xlnx,zynqmp-dwc3";
> + clock-names = "bus_early", "ref";
> reg = <0x0 0xff9d0000 0x0 0x100>;
> power-domains = <&zynqmp_firmware PD_USB_0>;
> resets = <&zynqmp_reset ZYNQMP_RESET_USB0_CORERESET>,
> @@ -818,11 +819,11 @@ usb0: usb@...d0000 {
>
> dwc3_0: usb@...00000 {
> compatible = "snps,dwc3";
> + clock-names = "ref";
> reg = <0x0 0xfe200000 0x0 0x40000>;
> interrupt-parent = <&gic>;
> interrupt-names = "dwc_usb3", "otg";
> interrupts = <0 65 4>, <0 69 4>;
> - clock-names = "bus_early", "ref";
> iommus = <&smmu 0x860>;
> snps,quirk-frame-length-adjustment = <0x20>;
> /* dma-coherent; */
> @@ -834,6 +835,7 @@ usb1: usb@...e0000 {
> #size-cells = <2>;
> status = "disabled";
> compatible = "xlnx,zynqmp-dwc3";
> + clock-names = "bus_early", "ref";
> reg = <0x0 0xff9e0000 0x0 0x100>;
> power-domains = <&zynqmp_firmware PD_USB_1>;
> resets = <&zynqmp_reset ZYNQMP_RESET_USB1_CORERESET>,
> @@ -844,11 +846,11 @@ usb1: usb@...e0000 {
>
> dwc3_1: usb@...00000 {
> compatible = "snps,dwc3";
> + clock-names = "ref";
Please place this in the same place as the previous property
> reg = <0x0 0xfe300000 0x0 0x40000>;
> interrupt-parent = <&gic>;
> interrupt-names = "dwc_usb3", "otg";
> interrupts = <0 70 4>, <0 74 4>;
> - clock-names = "bus_early", "ref";
> iommus = <&smmu 0x861>;
> snps,quirk-frame-length-adjustment = <0x20>;
> /* dma-coherent; */
> --
> 2.25.1
>
So the "combined" patch is something like
&usb0 {
+ clock-names = "bus_early", "ref";
+ assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
};
&dwc3_0 {
- clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
- clock-names = "bus_early", "ref";
+ clocks = <&zynqmp_clk USB3_DUAL_REF>;
+ clock-names = "ref";
};
For comparison, the "combined" patch for d8b1c3d0d700 ("arm64: dts: zynqmp:
Move USB clocks to dwc3 node") was
&usb0 {
- clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
- clock-names = "bus_early", "ref";
};
&dwc3_0 {
+ clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
+ clock-names = "bus_early", "ref";
};
So this appears to be a partial revert of that commit (or at the very least
a bugfix). However, I'm not sure what you're trying to accomplish. Your commit
message doesn't make sense to me, since the "ref" clock is already present.
--Sean
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