linux-kernel - [PATCH 01/17] tools/nolibc: make argc 32-bit in riscv startup code

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Date:   Tue, 19 Jul 2022 23:44:32 +0200
From:   Willy Tarreau <w@....eu>
To:     "Paul E . McKenney" <paulmck@...nel.org>
Cc:     Pranith Kumar <bobby.prani@...il.com>,
        Alviro Iskandar Setiawan <alviro.iskandar@...weeb.org>,
        Ammar Faizi <ammarfaizi2@...weeb.org>,
        David Laight <David.Laight@...LAB.COM>,
        Mark Brown <broonie@...nel.org>,
        Linus Torvalds <torvalds@...ux-foundation.org>,
        Shuah Khan <shuah@...nel.org>, linux-kselftest@...r.kernel.org,
        linux-kernel@...r.kernel.org, Willy Tarreau <w@....eu>
Subject: [PATCH 01/17] tools/nolibc: make argc 32-bit in riscv startup code

The "ld a0, 0(sp)" instruction doesn't build on RISCV32 because that
would load a 64-bit value into a 32-bit register. But argc 32-bit,
not 64, so we ought to use "lw" here. Tested on both RISCV32 and
RISCV64.

Cc: Pranith Kumar <bobby.prani@...il.com>
Signed-off-by: Willy Tarreau <w@....eu>
---
 tools/include/nolibc/arch-riscv.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/include/nolibc/arch-riscv.h b/tools/include/nolibc/arch-riscv.h
index 95e2b7924925..ba04771cb3a3 100644
--- a/tools/include/nolibc/arch-riscv.h
+++ b/tools/include/nolibc/arch-riscv.h
@@ -190,7 +190,7 @@ __asm__ (".section .text\n"
     ".option norelax\n"
     "lla   gp, __global_pointer$\n"
     ".option pop\n"
-    "ld    a0, 0(sp)\n"          // argc (a0) was in the stack
+    "lw    a0, 0(sp)\n"          // argc (a0) was in the stack
     "add   a1, sp, "SZREG"\n"    // argv (a1) = sp
     "slli  a2, a0, "PTRLOG"\n"   // envp (a2) = SZREG*argc ...
     "add   a2, a2, "SZREG"\n"    //             + SZREG (skip null)
-- 
2.17.5