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Message-ID: <20220720124148.7969-3-akhilrajeev@nvidia.com>
Date: Wed, 20 Jul 2022 18:11:48 +0530
From: Akhil R <akhilrajeev@...dia.com>
To: <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
<christian.koenig@....com>, <digetx@...il.com>,
<jonathanh@...dia.com>, <ldewangan@...dia.com>,
<linux-i2c@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <sumit.semwal@...aro.org>,
<thierry.reding@...il.com>, <wsa@...nel.org>
CC: <akhilrajeev@...dia.com>
Subject: [PATCH 2/2] arm64: tegra: Add GPCDMA support for Tegra234 I2C
Add dma properties to support GPCDMA in Tegra234 I2C
Signed-off-by: Akhil R <akhilrajeev@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra234.dtsi | 32 ++++++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index c3d2e48994d1..c9eed199d980 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -668,6 +668,10 @@
clock-names = "div-clk", "parent";
resets = <&bpmp TEGRA234_RESET_I2C1>;
reset-names = "i2c";
+ dmas = <&gpcdma 21>, <&gpcdma 21>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
cam_i2c: i2c@...0000 {
@@ -683,6 +687,10 @@
clock-names = "div-clk", "parent";
resets = <&bpmp TEGRA234_RESET_I2C3>;
reset-names = "i2c";
+ dmas = <&gpcdma 23>, <&gpcdma 23>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
dp_aux_ch1_i2c: i2c@...0000 {
@@ -698,6 +706,10 @@
clock-names = "div-clk", "parent";
resets = <&bpmp TEGRA234_RESET_I2C4>;
reset-names = "i2c";
+ dmas = <&gpcdma 26>, <&gpcdma 26>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
dp_aux_ch0_i2c: i2c@...0000 {
@@ -713,6 +725,10 @@
clock-names = "div-clk", "parent";
resets = <&bpmp TEGRA234_RESET_I2C6>;
reset-names = "i2c";
+ dmas = <&gpcdma 30>, <&gpcdma 30>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
dp_aux_ch2_i2c: i2c@...0000 {
@@ -728,6 +744,10 @@
clock-names = "div-clk", "parent";
resets = <&bpmp TEGRA234_RESET_I2C7>;
reset-names = "i2c";
+ dmas = <&gpcdma 27>, <&gpcdma 27>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
dp_aux_ch3_i2c: i2c@...0000 {
@@ -743,6 +763,10 @@
clock-names = "div-clk", "parent";
resets = <&bpmp TEGRA234_RESET_I2C9>;
reset-names = "i2c";
+ dmas = <&gpcdma 31>, <&gpcdma 31>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
spi@...0000 {
@@ -1026,6 +1050,10 @@
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA234_RESET_I2C2>;
reset-names = "i2c";
+ dmas = <&gpcdma 22>, <&gpcdma 22>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
gen8_i2c: i2c@...0000 {
@@ -1042,6 +1070,10 @@
assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
resets = <&bpmp TEGRA234_RESET_I2C8>;
reset-names = "i2c";
+ dmas = <&gpcdma 0>, <&gpcdma 0>;
+ dma-names = "rx", "tx";
+ iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
+ dma-coherent;
};
rtc@...0000 {
--
2.17.1
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