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Message-ID: <AS8PR04MB8676A571079D8DF4C22B84558C919@AS8PR04MB8676.eurprd04.prod.outlook.com>
Date: Thu, 21 Jul 2022 06:05:45 +0000
From: Hongxing Zhu <hongxing.zhu@....com>
To: Bjorn Helgaas <helgaas@...nel.org>
CC: "l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
"lorenzo.pieralisi@....com" <lorenzo.pieralisi@....com>,
"tharvey@...eworks.com" <tharvey@...eworks.com>,
"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH v2] PCI: imx6: Support more than Gen2 speed link mode
> -----Original Message-----
> From: Bjorn Helgaas <helgaas@...nel.org>
> Sent: 2022年7月21日 5:16
> To: Hongxing Zhu <hongxing.zhu@....com>
> Cc: l.stach@...gutronix.de; bhelgaas@...gle.com;
> lorenzo.pieralisi@....com; tharvey@...eworks.com;
> linux-pci@...r.kernel.org; linux-arm-kernel@...ts.infradead.org;
> linux-kernel@...r.kernel.org; kernel@...gutronix.de; dl-linux-imx
> <linux-imx@....com>
> Subject: Re: [PATCH v2] PCI: imx6: Support more than Gen2 speed link mode
>
> On Wed, Jul 20, 2022 at 11:26:16AM +0800, Richard Zhu wrote:
> > Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up
> to
> > Gen3 link speed.
> >
> > Link:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Flore.ker
> nel.org%2Fr%2F1652866528-13220-2-git-send-email-hongxing.zhu%40nxp.co
> m&data=05%7C01%7Chongxing.zhu%40nxp.com%7Ceb7d668e5b7d469
> 8e62c08da6a9502a8%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%
> 7C637939485477367788%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjA
> wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C
> %7C&sdata=ruq7cOi7uAOq6qOFtj1OXpi6EVgeNTDFozOHJnZpga8%3D&a
> mp;reserved=0
> > Signed-off-by: Richard Zhu <hongxing.zhu@....com>
> > Signed-off-by: Bjorn Helgaas <bhelgaas@...gle.com>
>
> You should not post patches with my signed-off-by.
>
Okay, got that.
> I add my signed-off-by to patches when I merge them.
>
> I applied this to pci/ctrl/imx6, replacing the v1 patch, thanks!
>
Thanks a lot for your kindly help.
Best Regards
Richard Zhu
> > ---
> > Changes from v1:
> > - The Supported Link Speeds of the PCI_EXP_LNKCAP should be re-configured
> too.
> > - When only Gen1 is enabled, refine the dev_info accordingly.
> >
> > ---
> > drivers/pci/controller/dwc/pci-imx6.c | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> b/drivers/pci/controller/dwc/pci-imx6.c
> > index e1ba11dabaa8..b66876f7efe0 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -844,12 +844,12 @@ static int imx6_pcie_start_link(struct dw_pcie
> *pci)
> > if (ret)
> > goto err_reset_phy;
> >
> > - if (pci->link_gen == 2) {
> > - /* Allow Gen2 mode after the link is up. */
> > + if (pci->link_gen > 1) {
> > + /* Allow faster modes after the link is up */
> > dw_pcie_dbi_ro_wr_en(pci);
> > tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
> > tmp &= ~PCI_EXP_LNKCAP_SLS;
> > - tmp |= PCI_EXP_LNKCAP_SLS_5_0GB;
> > + tmp |= pci->link_gen;
> > dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
> >
> > /*
> > @@ -884,7 +884,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> > if (ret)
> > goto err_reset_phy;
> > } else {
> > - dev_info(dev, "Link: Gen2 disabled\n");
> > + dev_info(dev, "Link: Only Gen1 is enabled\n");
> > }
> >
> > imx6_pcie->link_is_up = true;
> > --
> > 2.25.1
> >
> >
> > _______________________________________________
> > linux-arm-kernel mailing list
> > linux-arm-kernel@...ts.infradead.org
> >
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