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Message-ID: <9fe7ad54-99d4-b972-1f4d-a5744efc5583@microchip.com>
Date:   Thu, 21 Jul 2022 07:59:56 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <jiaqing.zhao@...ux.intel.com>, <linux-mtd@...ts.infradead.org>,
        <p.yadav@...com>, <michael@...le.cc>
CC:     <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/2] mtd: spi-nor: micron: Add SPI_NOR_DUAL_READ flag on
 mt25ql02g

On 5/22/22 08:48, Jiaqing Zhao wrote:
> [You don't often get email from jiaqing.zhao@...ux.intel.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification.]
> 
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The Micron mt25ql02g supports x2 width dual mode operation. This patch
> adds the SPI_NOR_DUAL_READ flag to its flash_info entry.

can't the dual mode be retrieved from SFDP?
Can you dump the sysfs sfdp table please?

> 
> Signed-off-by: Jiaqing Zhao <jiaqing.zhao@...ux.intel.com>
> ---
>  drivers/mtd/spi-nor/micron-st.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi-nor/micron-st.c b/drivers/mtd/spi-nor/micron-st.c
> index 8a20475ce77a..da0251c1a263 100644
> --- a/drivers/mtd/spi-nor/micron-st.c
> +++ b/drivers/mtd/spi-nor/micron-st.c
> @@ -233,7 +233,7 @@ static const struct flash_info st_nor_parts[] = {
>         },
>         { "mt25ql02g",   INFO(0x20ba22, 0, 64 * 1024, 4096)
>                 FLAGS(NO_CHIP_ERASE)
> -               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ)
> +               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
>                 MFR_FLAGS(USE_FSR)
>         },
>         { "mt25qu02g",   INFO(0x20bb22, 0, 64 * 1024, 4096)
> --
> 2.34.1
> 

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