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Message-ID: <20220721142052.25971-12-vidyas@nvidia.com>
Date: Thu, 21 Jul 2022 19:50:47 +0530
From: Vidya Sagar <vidyas@...dia.com>
To: <bhelgaas@...gle.com>, <lpieralisi@...nel.org>,
<robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<thierry.reding@...il.com>, <jonathanh@...dia.com>,
<jingoohan1@...il.com>, <gustavo.pimentel@...opsys.com>
CC: <kw@...ux.com>, <kishon@...com>, <linux-pci@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <kthota@...dia.com>,
<mmaddireddy@...dia.com>, <vidyas@...dia.com>, <sagar.tv@...il.com>
Subject: [PATCH V6 11/16] PCI: tegra194: Clear bandwidth management status
In the event of a bandwidth management interrupt, clear the bandwidth
management status in the configuration space also along with clearing
corresponding status in the application logic register to avoid slew
of interrupts.
Signed-off-by: Vidya Sagar <vidyas@...dia.com>
---
V6:
* New addition in V6 based on Bjorn's review comment
drivers/pci/controller/dwc/pcie-tegra194.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c
index 23377425952a..5f1798d37572 100644
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -370,6 +370,12 @@ static irqreturn_t tegra_pcie_rp_irq_handler(int irq, void *arg)
apply_bad_link_workaround(pp);
}
if (status_l1 & APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS) {
+ val_w = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
+ PCI_EXP_LNKSTA);
+ val_w |= PCI_EXP_LNKSTA_LBMS;
+ dw_pcie_writew_dbi(pci, pcie->pcie_cap_base +
+ PCI_EXP_LNKSTA, val_w);
+
appl_writel(pcie,
APPL_INTR_STATUS_L1_8_0_BW_MGT_INT_STS,
APPL_INTR_STATUS_L1_8_0);
--
2.17.1
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