linux-kernel - [PATCH v1 1/2] gpio: realtek-otto: amend ctrl struct docs

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Message-Id: <778b5c9f05c42c0963a5eca1c1c7e58b588a4bc7.1658477809.git.sander@svanheule.net>
Date:   Fri, 22 Jul 2022 10:19:16 +0200
From:   Sander Vanheule <sander@...nheule.net>
To:     linux-gpio@...r.kernel.org, Bartosz Golaszewski <brgl@...ev.pl>
Cc:     Linus Walleij <linus.walleij@...aro.org>,
        linux-kernel@...r.kernel.org, Bert Vermeulen <bert@...t.com>,
        Sander Vanheule <sander@...nheule.net>
Subject: [PATCH v1 1/2] gpio: realtek-otto: amend ctrl struct docs

Commit 512c5be35223 ("gpio: realtek-otto: Support reversed port
layouts") and commit 95fa6dbe58f2 ("gpio: realtek-otto: Support per-cpu
interrupts") updated the realtek_gpio_ctrl struct with new fields, but
the associated kernel-doc comment was not updated accordingly.

Signed-off-by: Sander Vanheule <sander@...nheule.net>
---
 drivers/gpio/gpio-realtek-otto.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpio/gpio-realtek-otto.c b/drivers/gpio/gpio-realtek-otto.c
index 63dcf42f7c20..a352fbfc3c28 100644
--- a/drivers/gpio/gpio-realtek-otto.c
+++ b/drivers/gpio/gpio-realtek-otto.c
@@ -43,9 +43,19 @@
  *
  * @gc: Associated gpio_chip instance
  * @base: Base address of the register block for a GPIO bank
+ * @cpumask_base: Base address of the interrupt routing registers
+ * @cpu_irq_maskable: Mask of CPUs that can be individually masked for IRQs
  * @lock: Lock for accessing the IRQ registers and values
  * @intr_mask: Mask for interrupts lines
  * @intr_type: Interrupt type selection
+ * @port_offset_u8: Get offset of an 8b port value
+ * @port_offset_u16: Get offset of a 16b port value
+ *
+ * The DIR, DATA, and ISR registers consist of four u8 port values, packed into
+ * a single 32b register. Use @port_offset_u8 to get the correct offset inside
+ * that register. The IMR register consists of four u16 port values, packed
+ * into two 32b registers. Use @port_offset_u16 to get the correct offset for
+ * the u16 value, starting from the first register.
  *
  * Because the interrupt mask register (IMR) combines the function of IRQ type
  * selection and masking, two extra values are stored. @intr_mask is used to
-- 
2.36.1