linux-kernel - Re: [PATCH net-next 2/2] net: macb: Add zynqmp SGMII dynamic configuration support

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Date:   Fri, 22 Jul 2022 09:24:37 +0000
From:   <Conor.Dooley@...rochip.com>
To:     <radhey.shyam.pandey@....com>, <michal.simek@...inx.com>,
        <Nicolas.Ferre@...rochip.com>, <Claudiu.Beznea@...rochip.com>,
        <davem@...emloft.net>, <edumazet@...gle.com>, <kuba@...nel.org>,
        <pabeni@...hat.com>, <gregkh@...uxfoundation.org>,
        <ronak.jain@...inx.com>
CC:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <netdev@...r.kernel.org>,
        <git@...inx.com>, <git@....com>
Subject: Re: [PATCH net-next 2/2] net: macb: Add zynqmp SGMII dynamic
 configuration support

On 22/07/2022 09:12, Radhey Shyam Pandey wrote:
> Add support for the dynamic configuration which takes care of configuring
> the GEM secure space configuration registers using EEMI APIs. High level
> sequence is to:
> - Check for the PM dynamic configuration support, if no error proceed with
>   GEM dynamic configurations(next steps) otherwise skip the dynamic
>   configuration.

For mpfs:
Tested-by: Conor Dooley <conor.dooley@...rochip.com>

> - Configure GEM Fixed configurations.
> - Configure GEM_CLK_CTRL (gemX_sgmii_mode).
> - Trigger GEM reset.
> 
> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@....com>
> ---
>  drivers/net/ethernet/cadence/macb_main.c | 20 ++++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 7eb7822cd184..97f77fa9e165 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -38,6 +38,7 @@
>  #include <linux/pm_runtime.h>
>  #include <linux/ptp_classify.h>
>  #include <linux/reset.h>
> +#include <linux/firmware/xlnx-zynqmp.h>
>  #include "macb.h"
>  
>  /* This structure is only used for MACB on SiFive FU540 devices */
> @@ -4621,6 +4622,25 @@ static int init_reset_optional(struct platform_device *pdev)
>  					     "failed to init SGMII PHY\n");
>  	}
>  
> +	ret = zynqmp_pm_is_function_supported(PM_IOCTL, IOCTL_SET_GEM_CONFIG);
> +	if (!ret) {
> +		u32 pm_info[2];
> +
> +		ret = of_property_read_u32_array(pdev->dev.of_node, "power-domains",
> +						 pm_info, ARRAY_SIZE(pm_info));
> +		if (ret < 0) {
> +			dev_err(&pdev->dev, "Failed to read power management information\n");
> +			return ret;
> +		}
> +		ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_FIXED, 0);
> +		if (ret < 0)
> +			return ret;
> +
> +		ret = zynqmp_pm_set_gem_config(pm_info[1], GEM_CONFIG_SGMII_MODE, 1);
> +		if (ret < 0)
> +			return ret;
> +	}
> +
>  	/* Fully reset controller at hardware level if mapped in device tree */
>  	ret = device_reset_optional(&pdev->dev);
>  	if (ret) {