linux-kernel - Re: [PATCH 2/2] soc: renesas: Identify RZ/Five SoC

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Date:   Fri, 22 Jul 2022 11:30:59 +0100
From:   "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To:     Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:     Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH 2/2] soc: renesas: Identify RZ/Five SoC

Hi Geert,

Thank you for the review.

On Fri, Jul 22, 2022 at 10:37 AM Geert Uytterhoeven
<geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Fri, Jul 22, 2022 at 12:12 AM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@...renesas.com> wrote:
> > Add support for identifying the (R9A07G043) RZ/Five SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
>
> Thanks for your patch!
>
> > --- a/drivers/soc/renesas/Kconfig
> > +++ b/drivers/soc/renesas/Kconfig
> > @@ -333,6 +333,16 @@ config ARCH_R9A09G011
> >
> >  endif # ARM64
> >
> > +if RISCV
> > +
> > +config ARCH_R9A07G043
> > +       bool "RISCV Platform support for RZ/Five"
>
> RISC-V
>
Agreed.

> > +       select ARCH_RZG2L
> > +       help
> > +         This enables support for the Renesas RZ/Five SoC.
> > +
> > +endif # RISCV
> > +
> >  config RST_RCAR
> >         bool "Reset Controller support for R-Car" if COMPILE_TEST
> >
>
> > @@ -102,6 +106,11 @@ static const struct renesas_soc soc_rmobile_a1 __initconst __maybe_unused = {
> >         .id     = 0x40,
> >  };
> >
> > +static const struct renesas_soc soc_rz_five __initconst __maybe_unused = {
> > +       .family = &fam_rzfive,
> > +       .id     = 0x847c447,
>
> The Hardware User's Manual Rev.1.00 says H’x841_C447?
>
You caught a typo in theHW manual, H’x841_C447 is the value for
RZ/G2L, for RZ/Five the value is H’x847_C447 (and can be verified on
page 146 SYS_DEVID register).

Below is the log from RZ/Five SMARC EVK:
U-Boot SPL 2020.10-ge84e786a34-dirty (Feb 25 2022 - 17:10:04 +0000)
Trying to boot from NOR


U-Boot 2020.10-ge84e786a34-dirty (Feb 25 2022 - 17:10:04 +0000)

CPU:   rv64imafdc
Model: smarc-rzf
DRAM:  896 MiB
MMC:   sh-sdhi: 0, sh-sdhi: 1
Loading Environment from MMC... OK
In:    serial@...4b800
Out:   serial@...4b800
Err:   serial@...4b800
Net:   eth0: ethernet@...30000
Hit any key to stop autoboot:  0
=> md 0x11020a04 1
11020a04: 0847c447                               G.G.
=>


> > @@ -398,6 +411,7 @@ static const struct renesas_id id_prr __initconst = {
> >
> >  static const struct of_device_id renesas_ids[] __initconst = {
> >         { .compatible = "renesas,bsid",                 .data = &id_bsid },
> > +       { .compatible = "renesas,r9a07g043-rzfive-sysc", .data = &id_rzg2l },
> >         { .compatible = "renesas,r9a07g043-sysc",       .data = &id_rzg2l },
> >         { .compatible = "renesas,r9a07g044-sysc",       .data = &id_rzg2l },
> >         { .compatible = "renesas,r9a07g054-sysc",       .data = &id_rzg2l },
>
> This change might not be needed (cfr. my comments on patch 1/2).
>
Ok.

Cheers,
Prabhakar