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Message-Id: <20220722125730.3428017-5-peng.fan@oss.nxp.com>
Date: Fri, 22 Jul 2022 20:57:26 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
shawnguo@...nel.org, s.hauer@...gutronix.de, l.stach@...gutronix.de
Cc: kernel@...gutronix.de, festevam@...il.com, linux-imx@....com,
laurent.pinchart@...asonboard.com, marex@...x.de,
paul.elder@...asonboard.com, aford173@...il.com,
Markus.Niebel@...tq-group.com, alexander.stein@...tq-group.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, aisheng.dong@....com,
Peng Fan <peng.fan@....com>
Subject: [PATCH V4 4/8] dt-bindings: soc: imx: add i.MX8MP vpu blk ctrl
From: Peng Fan <peng.fan@....com>
i.MX8MP VPU blk ctrl module has similar design as i.MX8MM, so reuse
the i.MX8MM VPU blk ctrl yaml file. And add description for the items.
Signed-off-by: Peng Fan <peng.fan@....com>
---
.../soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml | 112 +++++++++++++++---
include/dt-bindings/power/imx8mp-power.h | 4 +
2 files changed, 99 insertions(+), 17 deletions(-)
diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
index d79e5d2634d6..d71bb20d4907 100644
--- a/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml
@@ -30,32 +30,19 @@ properties:
maxItems: 4
power-domain-names:
- items:
- - const: bus
- - const: g1
- - const: g2
- - const: h1
+ maxItems: 4
clocks:
maxItems: 3
clock-names:
- items:
- - const: g1
- - const: g2
- - const: h1
+ maxItems: 3
interconnects:
- items:
- - description: G1 decoder interconnect
- - description: G2 decoder interconnect
- - description: H1 encoder power domain
+ maxItems: 3
interconnect-names:
- items:
- - const: g1
- - const: g2
- - const: h1
+ maxItems: 3
required:
- compatible
@@ -65,6 +52,97 @@ required:
- clocks
- clock-names
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mm-vpu-blk-ctrl
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: bus power domain
+ - description: G1 decoder power domain
+ - description: G2 decoder power domain
+ - description: H1 encoder power domain
+
+ power-domain-names:
+ items:
+ - const: bus
+ - const: g1
+ - const: g2
+ - const: h1
+
+ clocks:
+ items:
+ - description: G1 decoder clk
+ - description: G2 decoder clk
+ - description: H1 encoder clk
+
+ clock-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: h1
+
+ interconnects:
+ items:
+ - description: G1 decoder interconnect
+ - description: G2 decoder interconnect
+ - description: H1 encoder power domain
+
+ interconnect-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: h1
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mp-vpu-blk-ctrl
+ then:
+ properties:
+ power-domains:
+ items:
+ - description: bus power domain
+ - description: G1 decoder power domain
+ - description: G2 decoder power domain
+ - description: VC8000E encoder power domain
+
+ power-domain-names:
+ items:
+ - const: bus
+ - const: g1
+ - const: g2
+ - const: vc8000e
+
+ clocks:
+ items:
+ - description: G1 decoder clk
+ - description: G2 decoder clk
+ - description: VC8000E encoder clk
+
+ clock-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: vc8000e
+
+ interconnects:
+ items:
+ - description: G1 decoder interconnect
+ - description: G2 decoder interconnect
+ - description: VC8000E encoder interconnect
+
+ interconnect-names:
+ items:
+ - const: g1
+ - const: g2
+ - const: vc8000e
+
additionalProperties: false
examples:
diff --git a/include/dt-bindings/power/imx8mp-power.h b/include/dt-bindings/power/imx8mp-power.h
index 14b9c5ac9c82..2fe3c2abad13 100644
--- a/include/dt-bindings/power/imx8mp-power.h
+++ b/include/dt-bindings/power/imx8mp-power.h
@@ -52,4 +52,8 @@
#define IMX8MP_HDMIBLK_PD_HDCP 7
#define IMX8MP_HDMIBLK_PD_HRV 8
+#define IMX8MP_VPUBLK_PD_G1 0
+#define IMX8MP_VPUBLK_PD_G2 1
+#define IMX8MP_VPUBLK_PD_VC8000E 2
+
#endif
--
2.25.1
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