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Message-ID: <20220723135746.GB79279@nvidia.com>
Date: Sat, 23 Jul 2022 10:57:46 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Lu Baolu <baolu.lu@...ux.intel.com>
Cc: Joerg Roedel <joro@...tes.org>,
Christoph Hellwig <hch@...radead.org>,
Kevin Tian <kevin.tian@...el.com>,
Ashok Raj <ashok.raj@...el.com>, Will Deacon <will@...nel.org>,
Robin Murphy <robin.murphy@....com>,
Jean-Philippe Brucker <jean-philippe@...aro.com>,
Dave Jiang <dave.jiang@...el.com>,
Vinod Koul <vkoul@...nel.org>,
Eric Auger <eric.auger@...hat.com>,
Liu Yi L <yi.l.liu@...el.com>,
Jacob jun Pan <jacob.jun.pan@...el.com>,
Zhangfei Gao <zhangfei.gao@...aro.org>,
Zhu Tony <tony.zhu@...el.com>, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Jean-Philippe Brucker <jean-philippe@...aro.org>
Subject: Re: [PATCH v10 01/12] iommu: Add max_pasids field in struct
iommu_device
On Tue, Jul 05, 2022 at 01:06:59PM +0800, Lu Baolu wrote:
> Use this field to keep the number of supported PASIDs that an IOMMU
> hardware is able to support. This is a generic attribute of an IOMMU
> and lifting it into the per-IOMMU device structure makes it possible
> to allocate a PASID for device without calls into the IOMMU drivers.
> Any iommu driver that supports PASID related features should set this
> field before enabling them on the devices.
>
> In the Intel IOMMU driver, intel_iommu_sm is moved to CONFIG_INTEL_IOMMU
> enclave so that the pasid_supported() helper could be used in dmar.c
> without compilation errors.
>
> Signed-off-by: Lu Baolu <baolu.lu@...ux.intel.com>
> Reviewed-by: Jean-Philippe Brucker <jean-philippe@...aro.org>
> Reviewed-by: Kevin Tian <kevin.tian@...el.com>
> Tested-by: Zhangfei Gao <zhangfei.gao@...aro.org>
> Tested-by: Tony Zhu <tony.zhu@...el.com>
> ---
> include/linux/intel-iommu.h | 3 ++-
> include/linux/iommu.h | 2 ++
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 +
> drivers/iommu/intel/dmar.c | 7 +++++++
> 4 files changed, 12 insertions(+), 1 deletion(-)
Reviewed-by: Jason Gunthorpe <jgg@...dia.com>
Jason
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