linux-kernel - Re: [PATCH v6 07/13] mfd: mt6370: Add MediaTek MT6370 support

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Message-ID: <CABtFH5++4N1mECJ0vN-79WsJJWcBTVxLFgvkiouPf1qev7LHHQ@mail.gmail.com>
Date:   Mon, 25 Jul 2022 16:29:43 +0800
From:   ChiaEn Wu <peterwu.pub@...il.com>
To:     Andy Shevchenko <andy.shevchenko@...il.com>
Cc:     Lee Jones <lee.jones@...aro.org>,
        Daniel Thompson <daniel.thompson@...aro.org>,
        Jingoo Han <jingoohan1@...il.com>, Pavel Machek <pavel@....cz>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Sebastian Reichel <sre@...nel.org>,
        Chunfeng Yun <chunfeng.yun@...iatek.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Jonathan Cameron <jic23@...nel.org>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Liam Girdwood <lgirdwood@...il.com>,
        Mark Brown <broonie@...nel.org>,
        Guenter Roeck <linux@...ck-us.net>,
        "Krogerus, Heikki" <heikki.krogerus@...ux.intel.com>,
        Helge Deller <deller@....de>,
        ChiaEn Wu <chiaen_wu@...htek.com>,
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        szuni chen <szunichen@...il.com>
Subject: Re: [PATCH v6 07/13] mfd: mt6370: Add MediaTek MT6370 support

On Mon, Jul 25, 2022 at 4:00 PM Andy Shevchenko
<andy.shevchenko@...il.com> wrote:
>

...

>
> > +#define MT6370_REG_DEV_INFO    0x100
> > +#define MT6370_REG_CHG_IRQ1    0x1C0
> > +#define MT6370_REG_CHG_MASK1   0x1E0
> > +
> > +#define MT6370_VENID_MASK      GENMASK(7, 4)
> > +
> > +#define MT6370_NUM_IRQREGS     16
> > +#define MT6370_USBC_I2CADDR    0x4E
>
> > +#define MT6370_REG_ADDRLEN     2
> > +#define MT6370_REG_MAXADDR     0x1FF
>
> These two more logically to have near to other _REG_* definitions above.

Hi Andy,
Thanks for your review.
Do you mean that we should move '#define MT6370_USBC_I2CADDR' and
'#define MT6370_REG_MAXADDR' after the line '#define
MT6370_REG_CHG_MASK1'?
-------------------------------------------------------------------
#define MT6370_REG_DEV_INFO    0x100
#define MT6370_REG_CHG_IRQ1    0x1C0
#define MT6370_REG_CHG_MASK1   0x1E0
#define MT6370_USBC_I2CADDR    0x4E
#define MT6370_REG_MAXADDR     0x1FF

#define MT6370_VENID_MASK      GENMASK(7, 4)

#define MT6370_NUM_IRQREGS     16
#define MT6370_REG_ADDRLEN     2
-------------------------------------------------------------------
Like this?

>
> --
> With Best Regards,
> Andy Shevchenko

-- 
Best Regards,
ChiaEn Wu