lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20220725085822.2360234-1-linus.walleij@linaro.org>
Date:   Mon, 25 Jul 2022 10:58:21 +0200
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Mark Brown <broonie@...nel.org>
Cc:     linux-kernel@...r.kernel.org,
        Linus Walleij <linus.walleij@...aro.org>
Subject: [PATCH 1/2] regmap: Support accelerated noinc operations

Several architectures have accelerated operations for MMIO
operations writing to a single register, such as writesb, writesw,
writesl, writesq, readsb, readsw, readsl and readsq but regmap
currently cannot use them because we have no hooks for providing
an accelerated noinc back-end for MMIO.

Solve this by providing reg_[read/write]_noinc callbacks for
the bus abstraction, so that the regmap-mmio bus can use this.

Currently I do not see a need to support this for custom regmaps
so it is only added to the bus.

Callbacks are passed a void * with the array of values and a
count which is the number of items of the byte chunk size for
the specific register width.

Signed-off-by: Linus Walleij <linus.walleij@...aro.org>
---
 drivers/base/regmap/regmap.c | 164 ++++++++++++++++++++++++++++++++++-
 include/linux/regmap.h       |   8 ++
 2 files changed, 171 insertions(+), 1 deletion(-)

diff --git a/drivers/base/regmap/regmap.c b/drivers/base/regmap/regmap.c
index 2221d9863831..2923bb63ab95 100644
--- a/drivers/base/regmap/regmap.c
+++ b/drivers/base/regmap/regmap.c
@@ -2157,7 +2157,7 @@ int regmap_noinc_write(struct regmap *map, unsigned int reg,
 
 	if (!map->bus)
 		return -EINVAL;
-	if (!map->bus->write)
+	if (!map->bus->write && !map->bus->reg_noinc_write)
 		return -ENOTSUPP;
 	if (val_len % map->format.val_bytes)
 		return -EINVAL;
@@ -2173,6 +2173,92 @@ int regmap_noinc_write(struct regmap *map, unsigned int reg,
 		goto out_unlock;
 	}
 
+	/* Use the accelerated operation if we can */
+	if (map->bus->reg_noinc_write) {
+		size_t val_bytes = map->format.val_bytes;
+		size_t val_count = val_len / val_bytes;
+		unsigned int lastval;
+		const u8 *u8p;
+		const u16 *u16p;
+		const u32 *u32p;
+#ifdef CONFIG_64BIT
+		const u64 *u64p;
+#endif
+		int i;
+
+		switch (val_bytes) {
+		case 1:
+			u8p = val;
+			lastval = (unsigned int)u8p[val_count - 1];
+			break;
+		case 2:
+			u16p = val;
+			lastval = (unsigned int)u16p[val_count - 1];
+			break;
+		case 4:
+			u32p = val;
+			lastval = (unsigned int)u32p[val_count - 1];
+			break;
+#ifdef CONFIG_64BIT
+		case 8:
+			u64p = val;
+			lastval = (unsigned int)u64p[val_count - 1];
+			break;
+#endif
+		default:
+			ret = -EINVAL;
+			goto out_unlock;
+		}
+
+		/*
+		 * Update the cache with the last value we write, the rest is just
+		 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
+		 * sure a single read from the cache will work.
+		 */
+		if (!map->cache_bypass && !map->defer_caching) {
+			ret = regcache_write(map, reg, lastval);
+			if (ret != 0)
+				goto out_unlock;
+			if (map->cache_only) {
+				map->cache_dirty = true;
+				ret = 0;
+				goto out_unlock;
+			}
+		}
+
+		ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
+
+		if (!ret && regmap_should_log(map)) {
+			dev_info(map->dev, "%x <= [", reg);
+			for (i = 0; i < val_len; i++) {
+				switch (val_bytes) {
+				case 1:
+					pr_cont("%x", u8p[i]);
+					break;
+				case 2:
+					pr_cont("%x", u16p[i]);
+					break;
+				case 4:
+					pr_cont("%x", u32p[i]);
+					break;
+#ifdef CONFIG_64BIT
+				case 8:
+					pr_cont("%llx", u64p[i]);
+					break;
+#endif
+				default:
+					break;
+				}
+				if (i == (val_len - 1))
+					pr_cont("]\n");
+				else
+					pr_cont(",");
+			}
+		}
+		ret = 0;
+		goto out_unlock;
+	}
+
 	while (val_len) {
 		if (map->max_raw_write && map->max_raw_write < val_len)
 			write_len = map->max_raw_write;
@@ -2918,6 +3004,82 @@ int regmap_noinc_read(struct regmap *map, unsigned int reg,
 		goto out_unlock;
 	}
 
+	/* Use the accelerated operation if we can */
+	if (map->bus->reg_noinc_read) {
+		size_t val_bytes = map->format.val_bytes;
+		size_t val_count = val_len / val_bytes;
+		const u8 *u8p;
+		const u16 *u16p;
+		const u32 *u32p;
+#ifdef CONFIG_64BIT
+		const u64 *u64p;
+#endif
+		int i;
+
+		/*
+		 * We have not defined the FIFO semantics for cache, as the
+		 * cache is just one value deep. Should we return the last
+		 * written value? Just avoid this by always reading the FIFO
+		 * even when using cache. Cache only will not work.
+		 */
+		if (map->cache_only) {
+			ret = -EBUSY;
+			goto out_unlock;
+		}
+
+		switch (val_bytes) {
+		case 1:
+			u8p = val;
+			break;
+		case 2:
+			u16p = val;
+			break;
+		case 4:
+			u32p = val;
+			break;
+#ifdef CONFIG_64BIT
+		case 8:
+			u64p = val;
+			break;
+#endif
+		default:
+			ret = -EINVAL;
+			goto out_unlock;
+		}
+
+		ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
+
+		if (!ret && regmap_should_log(map)) {
+			dev_info(map->dev, "%x => [", reg);
+			for (i = 0; i < val_len; i++) {
+				switch (val_bytes) {
+				case 1:
+					pr_cont("%x", u8p[i]);
+					break;
+				case 2:
+					pr_cont("%x", u16p[i]);
+					break;
+				case 4:
+					pr_cont("%x", u32p[i]);
+					break;
+#ifdef CONFIG_64BIT
+				case 8:
+					pr_cont("%llx", u64p[i]);
+					break;
+#endif
+				default:
+					break;
+				}
+				if (i == (val_len - 1))
+					pr_cont("]\n");
+				else
+					pr_cont(",");
+			}
+		}
+		ret = 0;
+		goto out_unlock;
+	}
+
 	while (val_len) {
 		if (map->max_raw_read && map->max_raw_read < val_len)
 			read_len = map->max_raw_read;
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 8952fa3d0d59..c60bd3a4b098 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -489,8 +489,12 @@ typedef int (*regmap_hw_read)(void *context,
 			      void *val_buf, size_t val_size);
 typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg,
 				  unsigned int *val);
+typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg,
+					void *val, size_t val_count);
 typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg,
 				   unsigned int val);
+typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg,
+					 const void *val, size_t val_count);
 typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg,
 					 unsigned int mask, unsigned int val);
 typedef struct regmap_async *(*regmap_hw_async_alloc)(void);
@@ -511,6 +515,8 @@ typedef void (*regmap_hw_free_context)(void *context);
  *               must serialise with respect to non-async I/O.
  * @reg_write: Write a single register value to the given register address. This
  *             write operation has to complete when returning from the function.
+ * @reg_write_noinc: Write multiple register value to the same register. This
+ *             write operation has to complete when returning from the function.
  * @reg_update_bits: Update bits operation to be used against volatile
  *                   registers, intended for devices supporting some mechanism
  *                   for setting clearing bits without having to
@@ -538,9 +544,11 @@ struct regmap_bus {
 	regmap_hw_gather_write gather_write;
 	regmap_hw_async_write async_write;
 	regmap_hw_reg_write reg_write;
+	regmap_hw_reg_noinc_write reg_noinc_write;
 	regmap_hw_reg_update_bits reg_update_bits;
 	regmap_hw_read read;
 	regmap_hw_reg_read reg_read;
+	regmap_hw_reg_noinc_read reg_noinc_read;
 	regmap_hw_free_context free_context;
 	regmap_hw_async_alloc async_alloc;
 	u8 read_flag_mask;
-- 
2.36.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ