lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20220725100253.10687-2-allen-kh.cheng@mediatek.com>
Date:   Mon, 25 Jul 2022 18:02:52 +0800
From:   Allen-KH Cheng <allen-kh.cheng@...iatek.com>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Matthias Brugger <matthias.bgg@...il.com>
CC:     <angelogioacchino.delregno@...labora.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        "Chen-Yu Tsai" <wenst@...omium.org>,
        Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Subject: [PATCH 1/2] dt-bindings: pinctrl: mt8186: Add gpio-line-names property

Add the 'gpio-line-names' property to mt8186-pinctrl, as this will be
used in devicetrees to describe pin names.

Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
---
 Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
index 8a2bb8608291..6784885edc5c 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
@@ -28,6 +28,8 @@ properties:
   gpio-ranges:
     maxItems: 1
 
+  gpio-line-names: true
+
   reg:
     description: |
       Physical address base for gpio base registers. There are 8 different GPIO
-- 
2.18.0

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ