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Message-ID: <6a36c425-ca49-c7ec-69cd-f79dcce5bedc@collabora.com>
Date: Mon, 25 Jul 2022 12:35:56 +0200
From: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>
To: Allen-KH Cheng <allen-kh.cheng@...iatek.com>,
Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>
Cc: Project_Global_Chrome_Upstream_Group@...iatek.com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
Chen-Yu Tsai <wenst@...omium.org>
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: mt8186: Add gpio-line-names
property
Il 25/07/22 12:02, Allen-KH Cheng ha scritto:
> Add the 'gpio-line-names' property to mt8186-pinctrl, as this will be
> used in devicetrees to describe pin names.
>
> Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---
> Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
> index 8a2bb8608291..6784885edc5c 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8186.yaml
> @@ -28,6 +28,8 @@ properties:
> gpio-ranges:
> maxItems: 1
>
> + gpio-line-names: true
> +
> reg:
> description: |
> Physical address base for gpio base registers. There are 8 different GPIO
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