linux-kernel - Re: [PATCH v2 1/8] arm64: dts: mediatek: cherry: Enable the System Companion Processor

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Message-ID: <CAGXv+5Ekk_ndyPGVmWWRFkE3uveDHSczyf2OsdhOtqfSHxvnMw@mail.gmail.com>
Date:   Mon, 25 Jul 2022 12:21:38 +0800
From:   Chen-Yu Tsai <wenst@...omium.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Tinghan Shen <tinghan.shen@...iatek.com>
Cc:     matthias.bgg@...il.com, robh+dt@...nel.org,
        krzysztof.kozlowski+dt@...aro.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/8] arm64: dts: mediatek: cherry: Enable the System
 Companion Processor

On Thu, Jul 21, 2022 at 10:50 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com> wrote:
>
> MT8195 features a SCP like some other older SoCs, and Cherry uses it
> for various tasks. Add the required pin configuration and DMA pool
> and enable the node.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---
>  .../boot/dts/mediatek/mt8195-cherry.dtsi      | 28 +++++++++++++++++++
>  1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> index fcc600674339..feebbe367e93 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi
> @@ -104,6 +104,18 @@ usb_vbus: regulator-5v0-usb-vbus {
>                 enable-active-high;
>                 regulator-always-on;
>         };
> +
> +       reserved_memory: reserved-memory {
> +               #address-cells = <2>;
> +               #size-cells = <2>;
> +               ranges;
> +
> +               scp_mem: memory@...00000 {
> +                       compatible = "shared-dma-pool";
> +                       reg = <0 0x50000000 0 0x2900000>;
> +                       no-map;
> +               };
> +       };
>  };
>
>  &i2c0 {
> @@ -600,6 +612,14 @@ pins-low-power-pupd {
>                 };
>         };
>
> +       scp_pins: scp-default-pins {
> +               pins-vreq {
> +                       pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
> +                       bias-disable;
> +                       input-enable;
> +               };
> +       };
> +
>         spi0_pins: spi0-default-pins {
>                 pins-cs-mosi-clk {
>                         pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
> @@ -643,6 +663,14 @@ &pmic {
>         interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
>  };
>
> +&scp {
> +       status = "okay";
> +
> +       memory-region = <&scp_mem>;
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&scp_pins>;

firmware-name = "mediatek/mt8195/scp.img";

Or maybe this should be added to the base mt8195.dtsi?

The entry for mt8192 was added to mt8192-asurada.dtsi though.

Tinghan, could you ask internally whether the SCP firmware should be
tied to the SoC or the projects involving the SoC?

Thanks
ChenYu

> +};
> +
>  &spi0 {
>         status = "okay";
>
> --
> 2.35.1
>
>