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Message-Id: <20220727114302.302201-1-apatel@ventanamicro.com>
Date: Wed, 27 Jul 2022 17:13:00 +0530
From: Anup Patel <apatel@...tanamicro.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Thomas Gleixner <tglx@...utronix.de>
Cc: Andrew Jones <ajones@...tanamicro.com>,
Atish Patra <atishp@...shpatra.org>,
Samuel Holland <samuel@...lland.org>,
Anup Patel <anup@...infault.org>, devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org,
Anup Patel <apatel@...tanamicro.com>
Subject: [PATCH v2 0/2] Improve CLOCK_EVT_FEAT_C3STOP feature setting
This series improves the RISC-V timer driver to set CLOCK_EVT_FEAT_C3STOP
feature based on RISC-V platform capabilities.
These patches can also be found in riscv_timer_dt_imp_v2 branch at:
https://github.com/avpatel/linux.git
Changes since v1:
- Rebased on Linux-5.19-rc8
- Renamed "riscv,always-on" DT property to "riscv,timer-can-wake-cpu"
Anup Patel (2):
dt-bindings: riscv: Add optional DT property riscv,timer-can-wake-cpu
clocksource: timer-riscv: Set CLOCK_EVT_FEAT_C3STOP based on DT
property
Documentation/devicetree/bindings/riscv/cpus.yaml | 6 ++++++
drivers/clocksource/timer-riscv.c | 6 +++++-
2 files changed, 11 insertions(+), 1 deletion(-)
--
2.34.1
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