lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <75e5ace3-3255-2302-65f5-9fbef9cb1147@linaro.org>
Date:   Wed, 27 Jul 2022 15:00:40 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Biju Das <biju.das.jz@...renesas.com>,
        "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc:     Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Magnus Damm <magnus.damm@...il.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Anup Patel <anup@...infault.org>,
        Linux-Renesas <linux-renesas-soc@...r.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@...r.kernel.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/6] dt-bindings: riscv: Add DT binding documentation for
 Renesas RZ/Five SoC and SMARC EVK

On 27/07/2022 14:56, Biju Das wrote:
>>
>> Then it is not the same SoC! Same means same, identical. CPU
>> architecture is one of the major differences, which means it is not the
>> same.
> 
> Family SoC(R9A07G043) is at top level. Then it has different SoCId for taking care of
> differences for SoC based on ARMV8 and RISC-V which has separate compatible like
> r9a07g043u11 and r9a07g043f01?

This does not answer the concern - it's not the same SoC. The most
generic compatible denotes the most common part. I would argue that
instruction set and architecture are the most important differences.
None of ARMv8 SoCs (SoCs, not CPU cores) have "arm,armv8" compatible and
you went even more - you combined two architectures in the most generic
compatibles.

> 
>>
>>> Using same SoM and Carrier board?
>>
>> It's like saying PC with x86 and ARMv8 board are the same because they
>> both use same "PC chassis".
> 
> What I meant is board based on Family SoC(R9A07G043) that is either based on ARMv8 or
> RISC-V cpu architecture.

I don't see this related to the topic at all. What board do you use,
does not matter. The board does not change the fact these SoCs have
entirely different architecture - ARMv8 and RISC-V.


Best regards,
Krzysztof

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ