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Message-ID: <20220727154016.GA2719108-robh@kernel.org>
Date: Wed, 27 Jul 2022 09:40:16 -0600
From: Rob Herring <robh@...nel.org>
To: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>,
Linus Walleij <linus.walleij@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
linux-renesas-soc@...r.kernel.org, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Prabhakar <prabhakar.csengg@...il.com>,
Biju Das <biju.das.jz@...renesas.com>
Subject: Re: [PATCH] dt-bindings: pinctrl: renesas: Document RZ/Five SoC
On Tue, Jul 26, 2022 at 06:53:15PM +0100, Lad Prabhakar wrote:
> RZ/Five SoC is pin compatible with RZ/G2UL (Type 1) SoC. This patch
> updates the comment to include RZ/Five SoC so that we make it clear
> "renesas,r9a07g043-pinctrl" compatible string will be used for RZ/Five
> SoC.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> .../devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Same comments as here[1].
Rob
[1] https://lore.kernel.org/all/20220727153738.GA2696116-robh@kernel.org/
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