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Message-ID: <CY5PR11MB6187E92E7DA80111BDBA1E63E0999@CY5PR11MB6187.namprd11.prod.outlook.com>
Date:   Fri, 29 Jul 2022 03:00:52 +0000
From:   "Hu, Robert" <robert.hu@...el.com>
To:     "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        Dave Hansen <dave.hansen@...ux.intel.com>,
        "Lutomirski, Andy" <luto@...nel.org>,
        "Peter Zijlstra" <peterz@...radead.org>
CC:     "x86@...nel.org" <x86@...nel.org>,
        Kostya Serebryany <kcc@...gle.com>,
        Andrey Ryabinin <ryabinin.a.a@...il.com>,
        Andrey Konovalov <andreyknvl@...il.com>,
        Alexander Potapenko <glider@...gle.com>,
        Taras Madan <tarasmadan@...gle.com>,
        Dmitry Vyukov <dvyukov@...gle.com>,
        "H . J . Lu" <hjl.tools@...il.com>,
        Andi Kleen <ak@...ux.intel.com>,
        "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>,
        "linux-mm@...ck.org" <linux-mm@...ck.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: RE: [PATCHv5 01/13] x86/mm: Fix CR3_ADDR_MASK

> -----Original Message-----
> From: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> Sent: Wednesday, July 13, 2022 07:13
> To: Dave Hansen <dave.hansen@...ux.intel.com>; Lutomirski, Andy
> <luto@...nel.org>; Peter Zijlstra <peterz@...radead.org>
> Cc: x86@...nel.org; Kostya Serebryany <kcc@...gle.com>; Andrey Ryabinin
> <ryabinin.a.a@...il.com>; Andrey Konovalov <andreyknvl@...il.com>;
> Alexander Potapenko <glider@...gle.com>; Taras Madan
> <tarasmadan@...gle.com>; Dmitry Vyukov <dvyukov@...gle.com>; H . J . Lu
> <hjl.tools@...il.com>; Andi Kleen <ak@...ux.intel.com>; Edgecombe, Rick P
> <rick.p.edgecombe@...el.com>; linux-mm@...ck.org; linux-
> kernel@...r.kernel.org; Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> Subject: [PATCHv5 01/13] x86/mm: Fix CR3_ADDR_MASK
> 
> The mask must not include bits above physical address mask. These bits are
> reserved and can be used for other things. Bits 61 and 62 are used for Linear
> Address Masking.
> 
> Signed-off-by: Kirill A. Shutemov <kirill.shutemov@...ux.intel.com>
> Reviewed-by: Rick Edgecombe <rick.p.edgecombe@...el.com>
> ---
>  arch/x86/include/asm/processor-flags.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/x86/include/asm/processor-flags.h
> b/arch/x86/include/asm/processor-flags.h
> index 02c2cbda4a74..a7f3d9100adb 100644
> --- a/arch/x86/include/asm/processor-flags.h
> +++ b/arch/x86/include/asm/processor-flags.h
> @@ -35,7 +35,7 @@
>   */
[Hu, Robert] 
The comments above these #define's, explaining CR3 layout, can be updated on
the new CR3 bits as well?

>  #ifdef CONFIG_X86_64
>  /* Mask off the address space ID and SME encryption bits. */
> -#define CR3_ADDR_MASK	__sme_clr(0x7FFFFFFFFFFFF000ull)
> +#define CR3_ADDR_MASK	__sme_clr(PHYSICAL_PAGE_MASK)
>  #define CR3_PCID_MASK	0xFFFull
>  #define CR3_NOFLUSH	BIT_ULL(63)
> 
> --
> 2.35.1

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